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333 lines
7.3 KiB
Plaintext
333 lines
7.3 KiB
Plaintext
/*
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* Device Tree Include file for Traverse LS1043S board.
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*
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* Copyright 2014-2015, Freescale Semiconductor
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* Copyright 2017-2018, Traverse Technologies
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPLv2 or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "fsl-ls1043a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Traverse LS1043S";
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compatible = "traverse,ls1043s";
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aliases {
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crypto = &crypto;
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ethernet0 = &EMAC0;
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ethernet1 = &EMAC1;
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ethernet2 = &EMAC2;
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ethernet3 = &EMAC3;
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ethernet4 = &EMAC4;
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ethernet5 = &EMAC5;
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};
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leds {
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compatible = "gpio-leds";
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gpio0 {
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label = "ls1043s:green:user0";
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gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
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};
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gpio1 {
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label = "ls1043s:green:user1";
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gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
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};
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/* LED D17 */
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gpio2 {
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label = "ls1043s:green:wan";
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gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
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};
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gpio3 {
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label = "ls1043s:yellow:wan";
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gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
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};
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/* LED D18 */
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gpio4 {
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label = "ls1043s:green:mgmt";
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gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
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};
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gpio5 {
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label = "ls1043s:yellow:mgmt";
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gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
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};
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/* LED D6 */
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gpio6 {
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label = "ls1043s:green:user2";
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gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
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};
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/* SFP+ LEDs - these are for chassis
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* with lightpipes only
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*/
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teng_act {
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label = "ls1043s:yellow:10gact";
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gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
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};
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teng_link {
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label = "ls1043s:green:10glink";
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gpios = <&gpio4 1 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <1000>;
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/* This button may not be loaded on all boards */
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button@0 {
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label = "Front button";
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linux,code = <KEY_SETUP>;
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gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
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};
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/* This is wired to header S3 */
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button@1 {
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label = "Rear button";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&esdhc {
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mmc-hs200-1_8v;
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sd-uhs-sdr104;
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sd-uhs-sdr50;
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sd-uhs-sdr25;
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sd-uhs-sdr12;
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};
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&i2c0 {
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status = "okay";
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rtc@6f {
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compatible = "intersil,isl1208";
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reg = <0x6f>;
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};
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sfp_pca9534: pca9534@24 {
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compatible = "ti,tca9534", "nxp,pca9534";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x24>;
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gpio-base = <100>;
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};
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controller@50 {
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compatible = "traverse,controller";
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reg = <0x50>;
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};
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ds125df111@18 {
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compatible = "ti,ds125df111";
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reg = <0x18>;
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};
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emc1704@4c {
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compatible = "microchip,emc1704";
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reg = <0x4c>;
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};
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pac1934@16 {
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compatible = "microchip,pac1934";
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reg = <0x16>;
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/* Monitoring 3.3V, 5V, Vin/12V (voltage only), Vbat/RTC (voltage only) */
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shunt-resistors = <4000 12000 0 0>;
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};
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pmic@8 {
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compatible = "freescale,mc34vr500";
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reg = <0x08>;
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};
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};
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/* I2C Bus for SFP EEPROM and control
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* These are multiplexed so
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* they don't collide when loaded
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*/
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&i2c3 {
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status = "okay";
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i2c-switch@70 {
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compatible = "nxp,pca9540";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x70>;
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gigsfp_i2c: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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};
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tensfp_i2c: i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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};
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};
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};
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&ifc {
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status = "okay";
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#address-cells = <2>;
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#size-cells = <1>;
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/* Only NAND flash is used on this board */
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ranges = <0x0 0x0 0x0 0x7e800000 0x00010000>;
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nand@1,0 {
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compatible = "fsl,ifc-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0 0x0 0x10000>;
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};
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};
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&duart0 {
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status = "okay";
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};
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&duart1 {
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status = "okay";
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};
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#include "fsl-ls1043-post.dtsi"
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&fman0 {
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EMAC0: ethernet@e0000 {
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phy-handle = <&qsgmii_phy1>;
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phy-connection-type = "qsgmii";
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local-mac-address = [0A 00 00 00 00 01];
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};
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EMAC1: ethernet@e2000 {
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phy-handle = <&qsgmii_phy2>;
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phy-connection-type = "qsgmii";
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local-mac-address = [0A 00 00 00 00 02];
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};
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EMAC2: ethernet@e8000 {
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phy-handle = <&qsgmii_phy3>;
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phy-connection-type = "qsgmii";
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local-mac-address = [0A 00 00 00 00 03];
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};
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EMAC3: ethernet@ea000 {
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phy-handle = <&qsgmii_phy4>;
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phy-connection-type = "qsgmii";
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local-mac-address = [0A 00 00 00 00 04];
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};
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/* SFP via AR8031
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* We treat this as a fixed-link as the
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* AR8031 is hard-configured into
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* 1000BASE-X mode
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* Should MII control be desired, remove
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* fixed-link and add
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* phy-handle = <&rgmii_phy1>;
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*/
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EMAC4: ethernet@e4000 {
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phy-connection-type = "rgmii";
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local-mac-address = [0A 00 00 00 00 05];
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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/* Connection to Expansion (M.2) slot
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* Future WAN (i.e xDSL) plugin
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*/
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EMAC5: ethernet@e6000 {
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phy-connection-type = "rgmii-id";
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local-mac-address = [00 00 00 00 00 06];
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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/* 10G SFP+ interface
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* This can also run at 1.25 and 2.5G with
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* the appropriate SerDes protocol setting in RCW
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*/
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TENSFP: ethernet@f0000 {
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status = "okay";
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phy-connection-type = "xgmii";
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fixed-link {
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speed = <10000>;
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full-duplex;
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};
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};
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mdio@fc000 {
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rgmii_phy1: ethernet-phy@2 {
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reg = <0x2>;
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};
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qsgmii_phy1: ethernet-phy@4 {
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reg = <0x4>;
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};
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qsgmii_phy2: ethernet-phy@5 {
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reg = <0x5>;
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};
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qsgmii_phy3: ethernet-phy@6 {
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reg = <0x6>;
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};
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qsgmii_phy4: ethernet-phy@7 {
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reg = <0x7>;
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};
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};
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};
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/* No QUICC engine functions on this board -
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* pins are used for other functions (GPIO, I2C etc.)
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*/
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&uqe {
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status = "disabled";
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};
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/* LS1043S does not use the QorIQ AHCI
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* controller.
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*/
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&sata {
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status = "disabled";
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};
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