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490 lines
15 KiB
Diff
490 lines
15 KiB
Diff
From 7992b4384d94c5e1bad998ca3a9a5781caac8e62 Mon Sep 17 00:00:00 2001
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From: Yangbo Lu <yangbo.lu@nxp.com>
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Date: Mon, 25 Sep 2017 09:52:26 +0800
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Subject: [PATCH] config: support layerscape
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This is a integrated patch for layerscape config/makefile support.
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Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
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Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
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Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
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Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
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Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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---
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drivers/base/Kconfig | 1 +
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drivers/crypto/Makefile | 2 +-
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drivers/net/ethernet/freescale/Kconfig | 4 +-
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drivers/net/ethernet/freescale/Makefile | 2 +
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drivers/ptp/Kconfig | 29 ++++++
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drivers/rtc/Kconfig | 8 ++
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drivers/rtc/Makefile | 1 +
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drivers/soc/Kconfig | 3 +-
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drivers/soc/fsl/Kconfig | 22 +++++
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drivers/soc/fsl/Kconfig.arm | 16 ++++
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drivers/soc/fsl/Makefile | 4 +
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drivers/soc/fsl/layerscape/Kconfig | 10 +++
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drivers/soc/fsl/layerscape/Makefile | 1 +
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drivers/soc/fsl/rcpm.c | 154 ++++++++++++++++++++++++++++++++
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drivers/staging/Kconfig | 6 ++
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drivers/staging/Makefile | 3 +
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drivers/staging/fsl-dpaa2/Kconfig | 41 +++++++++
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drivers/staging/fsl-dpaa2/Makefile | 9 ++
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18 files changed, 312 insertions(+), 4 deletions(-)
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create mode 100644 drivers/soc/fsl/Kconfig
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create mode 100644 drivers/soc/fsl/Kconfig.arm
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create mode 100644 drivers/soc/fsl/layerscape/Kconfig
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create mode 100644 drivers/soc/fsl/layerscape/Makefile
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create mode 100644 drivers/soc/fsl/rcpm.c
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create mode 100644 drivers/staging/fsl-dpaa2/Kconfig
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create mode 100644 drivers/staging/fsl-dpaa2/Makefile
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--- a/drivers/base/Kconfig
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+++ b/drivers/base/Kconfig
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@@ -237,6 +237,7 @@ config GENERIC_CPU_AUTOPROBE
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config SOC_BUS
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bool
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+ select GLOB
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source "drivers/base/regmap/Kconfig"
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--- a/drivers/crypto/Makefile
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+++ b/drivers/crypto/Makefile
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@@ -3,7 +3,7 @@ obj-$(CONFIG_CRYPTO_DEV_ATMEL_SHA) += at
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obj-$(CONFIG_CRYPTO_DEV_ATMEL_TDES) += atmel-tdes.o
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obj-$(CONFIG_CRYPTO_DEV_BFIN_CRC) += bfin_crc.o
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obj-$(CONFIG_CRYPTO_DEV_CCP) += ccp/
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-obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM) += caam/
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+obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON) += caam/
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obj-$(CONFIG_CRYPTO_DEV_GEODE) += geode-aes.o
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obj-$(CONFIG_CRYPTO_DEV_HIFN_795X) += hifn_795x.o
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obj-$(CONFIG_CRYPTO_DEV_IMGTEC_HASH) += img-hash.o
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--- a/drivers/net/ethernet/freescale/Kconfig
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+++ b/drivers/net/ethernet/freescale/Kconfig
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@@ -5,7 +5,7 @@
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config NET_VENDOR_FREESCALE
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bool "Freescale devices"
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default y
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- depends on FSL_SOC || QUICC_ENGINE || CPM1 || CPM2 || PPC_MPC512x || \
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+ depends on FSL_SOC || (QUICC_ENGINE && PPC32) || CPM1 || CPM2 || PPC_MPC512x || \
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M523x || M527x || M5272 || M528x || M520x || M532x || \
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ARCH_MXC || ARCH_MXS || (PPC_MPC52xx && PPC_BESTCOMM) || \
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ARCH_LAYERSCAPE
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@@ -93,4 +93,6 @@ config GIANFAR
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and MPC86xx family of chips, the eTSEC on LS1021A and the FEC
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on the 8540.
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+source "drivers/net/ethernet/freescale/sdk_fman/Kconfig"
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+source "drivers/net/ethernet/freescale/sdk_dpaa/Kconfig"
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endif # NET_VENDOR_FREESCALE
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--- a/drivers/net/ethernet/freescale/Makefile
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+++ b/drivers/net/ethernet/freescale/Makefile
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@@ -21,4 +21,6 @@ gianfar_driver-objs := gianfar.o \
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obj-$(CONFIG_UCC_GETH) += ucc_geth_driver.o
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ucc_geth_driver-objs := ucc_geth.o ucc_geth_ethtool.o
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+obj-$(if $(CONFIG_FSL_SDK_FMAN),y) += sdk_fman/
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+obj-$(if $(CONFIG_FSL_SDK_DPAA_ETH),y) += sdk_dpaa/
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obj-$(CONFIG_FSL_FMAN) += fman/
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--- a/drivers/ptp/Kconfig
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+++ b/drivers/ptp/Kconfig
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@@ -39,6 +39,35 @@ config PTP_1588_CLOCK_GIANFAR
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To compile this driver as a module, choose M here: the module
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will be called gianfar_ptp.
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+config PTP_1588_CLOCK_DPAA
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+ tristate "Freescale DPAA as PTP clock"
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+ depends on FSL_SDK_DPAA_ETH
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+ select PTP_1588_CLOCK
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+ select FSL_DPAA_TS
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+ default n
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+ help
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+ This driver adds support for using the DPAA 1588 timer module
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+ as a PTP clock. This clock is only useful if your PTP programs are
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+ getting hardware time stamps on the PTP Ethernet packets
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+ using the SO_TIMESTAMPING API.
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+
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+ To compile this driver as a module, choose M here: the module
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+ will be called dpaa_ptp.
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+
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+config PTP_1588_CLOCK_DPAA2
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+ tristate "Freescale DPAA2 as PTP clock"
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+ depends on FSL_DPAA2_ETH
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+ select PTP_1588_CLOCK
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+ default y
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+ help
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+ This driver adds support for using the DPAA2 1588 timer module
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+ as a PTP clock. This clock is only useful if your PTP programs are
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+ getting hardware time stamps on the PTP Ethernet packets
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+ using the SO_TIMESTAMPING API.
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+
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+ To compile this driver as a module, choose M here: the module
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+ will be called dpaa2-rtc.
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+
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config PTP_1588_CLOCK_IXP46X
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tristate "Intel IXP46x as PTP clock"
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depends on IXP4XX_ETH
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--- a/drivers/rtc/Kconfig
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+++ b/drivers/rtc/Kconfig
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@@ -414,6 +414,14 @@ config RTC_DRV_PCF85063
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This driver can also be built as a module. If so, the module
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will be called rtc-pcf85063.
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+config RTC_DRV_PCF85263
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+ tristate "NXP PCF85263"
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+ help
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+ If you say yes here you get support for the PCF85263 RTC chip
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+
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+ This driver can also be built as a module. If so, the module
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+ will be called rtc-pcf85263.
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+
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config RTC_DRV_PCF8563
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tristate "Philips PCF8563/Epson RTC8564"
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help
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--- a/drivers/rtc/Makefile
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+++ b/drivers/rtc/Makefile
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@@ -111,6 +111,7 @@ obj-$(CONFIG_RTC_DRV_PCF2127) += rtc-pcf
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obj-$(CONFIG_RTC_DRV_PCF50633) += rtc-pcf50633.o
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obj-$(CONFIG_RTC_DRV_PCF85063) += rtc-pcf85063.o
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obj-$(CONFIG_RTC_DRV_PCF8523) += rtc-pcf8523.o
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+obj-$(CONFIG_RTC_DRV_PCF85263) += rtc-pcf85263.o
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obj-$(CONFIG_RTC_DRV_PCF8563) += rtc-pcf8563.o
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obj-$(CONFIG_RTC_DRV_PCF8583) += rtc-pcf8583.o
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obj-$(CONFIG_RTC_DRV_PIC32) += rtc-pic32.o
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--- a/drivers/soc/Kconfig
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+++ b/drivers/soc/Kconfig
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@@ -1,8 +1,7 @@
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menu "SOC (System On Chip) specific Drivers"
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source "drivers/soc/bcm/Kconfig"
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-source "drivers/soc/fsl/qbman/Kconfig"
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-source "drivers/soc/fsl/qe/Kconfig"
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+source "drivers/soc/fsl/Kconfig"
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source "drivers/soc/mediatek/Kconfig"
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source "drivers/soc/qcom/Kconfig"
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source "drivers/soc/rockchip/Kconfig"
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--- /dev/null
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+++ b/drivers/soc/fsl/Kconfig
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@@ -0,0 +1,22 @@
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+#
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+# Freescale SOC drivers
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+#
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+
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+source "drivers/soc/fsl/qbman/Kconfig"
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+source "drivers/soc/fsl/qe/Kconfig"
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+source "drivers/soc/fsl/ls2-console/Kconfig"
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+
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+config FSL_GUTS
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+ bool
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+ select SOC_BUS
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+ help
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+ The global utilities block controls power management, I/O device
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+ enabling, power-onreset(POR) configuration monitoring, alternate
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+ function selection for multiplexed signals,and clock control.
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+ This driver is to manage and access global utilities block.
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+ Initially only reading SVR and registering soc device are supported.
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+ Other guts accesses, such as reading RCW, should eventually be moved
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+ into this driver as well.
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+if ARM || ARM64
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+source "drivers/soc/fsl/Kconfig.arm"
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+endif
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--- /dev/null
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+++ b/drivers/soc/fsl/Kconfig.arm
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@@ -0,0 +1,16 @@
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+#
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+# Freescale ARM SOC Drivers
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+#
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+
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+config LS_SOC_DRIVERS
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+ bool "Layerscape Soc Drivers"
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+ depends on ARCH_LAYERSCAPE || SOC_LS1021A
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+ default n
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+ help
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+ Say y here to enable Freescale Layerscape Soc Device Drivers support.
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+ The Soc Drivers provides the device driver that is a specific block
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+ or feature on Layerscape platform.
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+
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+if LS_SOC_DRIVERS
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+ source "drivers/soc/fsl/layerscape/Kconfig"
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+endif
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--- a/drivers/soc/fsl/Makefile
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+++ b/drivers/soc/fsl/Makefile
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@@ -5,3 +5,7 @@
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obj-$(CONFIG_FSL_DPAA) += qbman/
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obj-$(CONFIG_QUICC_ENGINE) += qe/
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obj-$(CONFIG_CPM) += qe/
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+obj-$(CONFIG_FSL_GUTS) += guts.o
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+obj-$(CONFIG_FSL_LS2_CONSOLE) += ls2-console/
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+obj-$(CONFIG_SUSPEND) += rcpm.o
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+obj-$(CONFIG_LS_SOC_DRIVERS) += layerscape/
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--- /dev/null
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+++ b/drivers/soc/fsl/layerscape/Kconfig
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@@ -0,0 +1,10 @@
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+#
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+# Layerscape Soc drivers
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+#
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+config FTM_ALARM
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+ bool "FTM alarm driver"
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+ default n
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+ help
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+ Say y here to enable FTM alarm support. The FTM alarm provides
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+ alarm functions for wakeup system from deep sleep. There is only
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+ one FTM can be used in ALARM(FTM 0).
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--- /dev/null
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+++ b/drivers/soc/fsl/layerscape/Makefile
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@@ -0,0 +1 @@
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+obj-$(CONFIG_FTM_ALARM) += ftm_alarm.o
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--- /dev/null
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+++ b/drivers/soc/fsl/rcpm.c
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@@ -0,0 +1,154 @@
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+/*
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+ * Run Control and Power Management (RCPM) driver
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+ *
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+ * Copyright 2016 NXP
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ */
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+#define pr_fmt(fmt) "RCPM: %s: " fmt, __func__
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+
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+#include <linux/kernel.h>
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+#include <linux/io.h>
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+#include <linux/of_platform.h>
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+#include <linux/of_address.h>
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+#include <linux/suspend.h>
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+
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+/* RCPM register offset */
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+#define RCPM_IPPDEXPCR0 0x140
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+
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+#define RCPM_WAKEUP_CELL_SIZE 2
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+
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+struct rcpm_config {
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+ int ipp_num;
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+ int ippdexpcr_offset;
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+ u32 ippdexpcr[2];
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+ void *rcpm_reg_base;
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+};
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+
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+static struct rcpm_config *rcpm;
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+
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+static inline void rcpm_reg_write(u32 offset, u32 value)
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+{
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+ iowrite32be(value, rcpm->rcpm_reg_base + offset);
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+}
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+
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+static inline u32 rcpm_reg_read(u32 offset)
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+{
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+ return ioread32be(rcpm->rcpm_reg_base + offset);
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+}
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+
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+static void rcpm_wakeup_fixup(struct device *dev, void *data)
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+{
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+ struct device_node *node = dev ? dev->of_node : NULL;
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+ u32 value[RCPM_WAKEUP_CELL_SIZE];
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+ int ret, i;
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+
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+ if (!dev || !node || !device_may_wakeup(dev))
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+ return;
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+
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+ /*
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+ * Get the values in the "rcpm-wakeup" property.
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+ * Three values are:
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+ * The first is a pointer to the RCPM node.
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+ * The second is the value of the ippdexpcr0 register.
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+ * The third is the value of the ippdexpcr1 register.
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+ */
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+ ret = of_property_read_u32_array(node, "fsl,rcpm-wakeup",
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+ value, RCPM_WAKEUP_CELL_SIZE);
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+ if (ret)
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+ return;
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+
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+ pr_debug("wakeup source: the device %s\n", node->full_name);
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+
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+ for (i = 0; i < rcpm->ipp_num; i++)
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+ rcpm->ippdexpcr[i] |= value[i + 1];
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+}
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+
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+static int rcpm_suspend_prepare(void)
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+{
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+ int i;
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+
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+ BUG_ON(!rcpm);
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+
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+ for (i = 0; i < rcpm->ipp_num; i++)
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+ rcpm->ippdexpcr[i] = 0;
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+
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+ dpm_for_each_dev(NULL, rcpm_wakeup_fixup);
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+
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+ for (i = 0; i < rcpm->ipp_num; i++) {
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+ rcpm_reg_write(rcpm->ippdexpcr_offset + 4 * i,
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+ rcpm->ippdexpcr[i]);
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+ pr_debug("ippdexpcr%d = 0x%x\n", i, rcpm->ippdexpcr[i]);
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+ }
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+
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+ return 0;
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+}
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+
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+static int rcpm_suspend_notifier_call(struct notifier_block *bl,
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+ unsigned long state,
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+ void *unused)
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+{
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+ switch (state) {
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+ case PM_SUSPEND_PREPARE:
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+ rcpm_suspend_prepare();
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+ break;
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+ }
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+
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+ return NOTIFY_DONE;
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+}
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+
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+static struct rcpm_config rcpm_default_config = {
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+ .ipp_num = 1,
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+ .ippdexpcr_offset = RCPM_IPPDEXPCR0,
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+};
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+
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+static const struct of_device_id rcpm_matches[] = {
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+ {
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+ .compatible = "fsl,qoriq-rcpm-2.1",
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+ .data = &rcpm_default_config,
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+ },
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+ {}
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+};
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+
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+static struct notifier_block rcpm_suspend_notifier = {
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+ .notifier_call = rcpm_suspend_notifier_call,
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+};
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+
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+static int __init layerscape_rcpm_init(void)
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+{
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+ const struct of_device_id *match;
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+ struct device_node *np;
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+
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+ np = of_find_matching_node_and_match(NULL, rcpm_matches, &match);
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+ if (!np) {
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+ pr_err("Can't find the RCPM node.\n");
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+ return -EINVAL;
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+ }
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+
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+ if (match->data)
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+ rcpm = (struct rcpm_config *)match->data;
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+ else
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+ return -EINVAL;
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+
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+ rcpm->rcpm_reg_base = of_iomap(np, 0);
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+ of_node_put(np);
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+ if (!rcpm->rcpm_reg_base)
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+ return -ENOMEM;
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+
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+ register_pm_notifier(&rcpm_suspend_notifier);
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+
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+ pr_info("The RCPM driver initialized.\n");
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+
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+ return 0;
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+}
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+
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+subsys_initcall(layerscape_rcpm_init);
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--- a/drivers/staging/Kconfig
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+++ b/drivers/staging/Kconfig
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@@ -94,6 +94,8 @@ source "drivers/staging/fbtft/Kconfig"
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source "drivers/staging/fsl-mc/Kconfig"
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+source "drivers/staging/fsl-dpaa2/Kconfig"
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+
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source "drivers/staging/wilc1000/Kconfig"
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source "drivers/staging/most/Kconfig"
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@@ -106,4 +108,8 @@ source "drivers/staging/greybus/Kconfig"
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source "drivers/staging/vc04_services/Kconfig"
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+source "drivers/staging/fsl_qbman/Kconfig"
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+
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+source "drivers/staging/fsl_ppfe/Kconfig"
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+
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endif # STAGING
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--- a/drivers/staging/Makefile
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+++ b/drivers/staging/Makefile
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@@ -36,9 +36,12 @@ obj-$(CONFIG_UNISYSSPAR) += unisys/
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obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clocking-wizard/
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obj-$(CONFIG_FB_TFT) += fbtft/
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obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/
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+obj-$(CONFIG_FSL_DPAA2) += fsl-dpaa2/
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obj-$(CONFIG_WILC1000) += wilc1000/
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obj-$(CONFIG_MOST) += most/
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obj-$(CONFIG_ISDN_I4L) += i4l/
|
|
obj-$(CONFIG_KS7010) += ks7010/
|
|
obj-$(CONFIG_GREYBUS) += greybus/
|
|
obj-$(CONFIG_BCM2708_VCHIQ) += vc04_services/
|
|
+obj-$(CONFIG_FSL_SDK_DPA) += fsl_qbman/
|
|
+obj-$(CONFIG_FSL_PPFE) += fsl_ppfe/
|
|
--- /dev/null
|
|
+++ b/drivers/staging/fsl-dpaa2/Kconfig
|
|
@@ -0,0 +1,41 @@
|
|
+#
|
|
+# Freescale DataPath Acceleration Architecture Gen2 (DPAA2) drivers
|
|
+#
|
|
+
|
|
+config FSL_DPAA2
|
|
+ bool "Freescale DPAA2 devices"
|
|
+ depends on FSL_MC_BUS
|
|
+ ---help---
|
|
+ Build drivers for Freescale DataPath Acceleration
|
|
+ Architecture (DPAA2) family of SoCs.
|
|
+
|
|
+config FSL_DPAA2_ETH
|
|
+ tristate "Freescale DPAA2 Ethernet"
|
|
+ depends on FSL_DPAA2 && FSL_MC_DPIO
|
|
+ ---help---
|
|
+ Ethernet driver for Freescale DPAA2 SoCs, using the
|
|
+ Freescale MC bus driver
|
|
+
|
|
+if FSL_DPAA2_ETH
|
|
+config FSL_DPAA2_ETH_USE_ERR_QUEUE
|
|
+ bool "Enable Rx error queue"
|
|
+ default n
|
|
+ ---help---
|
|
+ Allow Rx error frames to be enqueued on an error queue
|
|
+ and processed by the driver (by default they are dropped
|
|
+ in hardware).
|
|
+ This may impact performance, recommended for debugging
|
|
+ purposes only.
|
|
+
|
|
+# QBMAN_DEBUG requires some additional DPIO APIs
|
|
+config FSL_DPAA2_ETH_DEBUGFS
|
|
+ depends on DEBUG_FS && FSL_QBMAN_DEBUG
|
|
+ bool "Enable debugfs support"
|
|
+ default n
|
|
+ ---help---
|
|
+ Enable advanced statistics through debugfs interface.
|
|
+endif
|
|
+
|
|
+source "drivers/staging/fsl-dpaa2/mac/Kconfig"
|
|
+source "drivers/staging/fsl-dpaa2/evb/Kconfig"
|
|
+source "drivers/staging/fsl-dpaa2/ethsw/Kconfig"
|
|
--- /dev/null
|
|
+++ b/drivers/staging/fsl-dpaa2/Makefile
|
|
@@ -0,0 +1,9 @@
|
|
+#
|
|
+# Freescale DataPath Acceleration Architecture Gen2 (DPAA2) drivers
|
|
+#
|
|
+
|
|
+obj-$(CONFIG_FSL_DPAA2_ETH) += ethernet/
|
|
+obj-$(CONFIG_FSL_DPAA2_MAC) += mac/
|
|
+obj-$(CONFIG_FSL_DPAA2_EVB) += evb/
|
|
+obj-$(CONFIG_FSL_DPAA2_ETHSW) += ethsw/
|
|
+obj-$(CONFIG_PTP_1588_CLOCK_DPAA2) += rtc/
|