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56 lines
1.5 KiB
Diff
56 lines
1.5 KiB
Diff
From f05b1ecd7e4fde7e69320a4b7be461636e982991 Mon Sep 17 00:00:00 2001
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From: Paul Cercueil <paul@crapouillou.net>
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Date: Thu, 13 Sep 2012 00:09:20 +0200
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Subject: [PATCH 5/7] RTC: JZ4740: Init the "regulator" register on startup.
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This register controls the accuracy of the RTC. uC/OS-II use
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the RTC as a 100Hz clock, and writes a completely wrong value
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on that register, that we have to overwrite if we want a working
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real-time clock.
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Signed-off-by: Paul Cercueil <paul@crapouillou.net>
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---
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drivers/rtc/rtc-jz4740.c | 17 +++++++++++++++++
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1 file changed, 17 insertions(+)
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--- a/drivers/rtc/rtc-jz4740.c
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+++ b/drivers/rtc/rtc-jz4740.c
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@@ -15,6 +15,7 @@
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*/
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#include <linux/io.h>
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+#include <linux/clk.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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@@ -216,6 +217,7 @@ static int jz4740_rtc_probe(struct platf
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struct jz4740_rtc *rtc;
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uint32_t scratchpad;
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struct resource *mem;
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+ struct clk *rtc_clk;
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rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
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if (!rtc)
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@@ -263,6 +265,21 @@ static int jz4740_rtc_probe(struct platf
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}
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}
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+ rtc_clk = clk_get(&pdev->dev, "rtc");
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+ if (IS_ERR(rtc_clk)) {
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+ dev_err(&pdev->dev, "Failed to get RTC clock\n");
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+ return PTR_ERR(rtc_clk);
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+ }
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+
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+ /* TODO: initialize the ADJC bits (25:16) to fine-tune
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+ * the accuracy of the RTC */
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+ ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_REGULATOR,
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+ (clk_get_rate(rtc_clk) - 1) & 0xffff);
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+ clk_put(rtc_clk);
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+
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+ if (ret)
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+ dev_warn(&pdev->dev, "Could not update RTC regulator register\n");
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+
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return 0;
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}
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