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134 lines
3.8 KiB
C
134 lines
3.8 KiB
C
/*
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* D-Link DIR-615 rev. I1 board support
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* Copyright (C) 2013-2015 Jaehoon You <teslamint@gmail.com>
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*
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* based on the DIR-600 rev. A1 board support code
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* Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
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*
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* based on the TP-LINK TL-WR841N/ND v8/TL-MR3420 v2 board support code
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* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/platform_device.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#define DIR_615_I1_GPIO_LED_WPS 15
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#define DIR_615_I1_GPIO_LED_POWER_AMBER 14
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#define DIR_615_I1_GPIO_LED_POWER_GREEN 4
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#define DIR_615_I1_GPIO_LED_WAN_AMBER 22
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#define DIR_615_I1_GPIO_LED_WAN_GREEN 12
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#define DIR_615_I1_GPIO_LED_WLAN_GREEN 13
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#define DIR_615_I1_GPIO_BTN_WPS 16
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#define DIR_615_I1_GPIO_BTN_RESET 17
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#define DIR_615_I1_KEYS_POLL_INTERVAL 20 /* msecs */
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#define DIR_615_I1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615_I1_KEYS_POLL_INTERVAL)
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#define DIR_615_I1_LAN_PHYMASK BIT(0)
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#define DIR_615_I1_WAN_PHYMASK BIT(4)
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#define DIR_615_I1_WLAN_MAC_ADDR 0x1fffffb4
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static struct gpio_led dir_615_i1_leds_gpio[] __initdata = {
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{
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.name = "d-link:green:power",
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.gpio = DIR_615_I1_GPIO_LED_POWER_GREEN,
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}, {
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.name = "d-link:amber:power",
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.gpio = DIR_615_I1_GPIO_LED_POWER_AMBER,
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}, {
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.name = "d-link:amber:wan",
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.gpio = DIR_615_I1_GPIO_LED_WAN_AMBER,
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}, {
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.name = "d-link:green:wan",
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.gpio = DIR_615_I1_GPIO_LED_WAN_GREEN,
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.active_low = 1,
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}, {
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.name = "d-link:green:wlan",
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.gpio = DIR_615_I1_GPIO_LED_WLAN_GREEN,
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.active_low = 1,
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}, {
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.name = "d-link:blue:wps",
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.gpio = DIR_615_I1_GPIO_LED_WPS,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button dir_615_i1_gpio_keys[] __initdata = {
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{
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.desc = "reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = DIR_615_I1_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DIR_615_I1_GPIO_BTN_RESET,
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.active_low = 1,
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}, {
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.desc = "wps",
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.type = EV_KEY,
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.code = KEY_WPS_BUTTON,
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.debounce_interval = DIR_615_I1_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DIR_615_I1_GPIO_BTN_WPS,
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.active_low = 1,
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}
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};
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static void __init dir_615_i1_setup(void)
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{
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u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
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u8 mac[ETH_ALEN];
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ath79_register_mdio(0, 0x0);
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ath79_register_mdio(1, ~(DIR_615_I1_WAN_PHYMASK));
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ath79_parse_ascii_mac((char *) KSEG1ADDR(DIR_615_I1_WLAN_MAC_ADDR), mac);
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ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
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ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
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/* GMAC0 is connected to the PHY0 of the internal switch */
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ath79_switch_data.phy4_mii_en = 1;
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
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ath79_eth0_data.phy_mask = DIR_615_I1_WAN_PHYMASK;
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ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
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/* GMAC1 is connected to the internal switch */
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ath79_eth1_data.phy_mask = DIR_615_I1_LAN_PHYMASK;
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
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ath79_register_eth(0);
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ath79_register_eth(1);
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ath79_register_m25p80(NULL);
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/* Disable JTAG, enabling GPIOs 0-3 */
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/* Configure OBS4 line, for GPIO 4*/
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ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
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AR934X_GPIO_FUNC_CLK_OBS4_EN);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615_i1_leds_gpio),
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dir_615_i1_leds_gpio);
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ath79_register_gpio_keys_polled(-1, DIR_615_I1_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(dir_615_i1_gpio_keys),
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dir_615_i1_gpio_keys);
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ath79_register_wmac(eeprom, mac);
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}
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MIPS_MACHINE(ATH79_MACH_DIR_615_I1, "DIR-615-I1", "D-Link DIR-615 rev. I1",
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dir_615_i1_setup);
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