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192 lines
5.1 KiB
C
192 lines
5.1 KiB
C
/*
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* D-Link DAP-2695 rev. A1 support
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*
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* Copyright (c) 2012 Qualcomm Atheros
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* Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (c) 2016 Stijn Tintel <stijn@linux-ipv6.be>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/platform_device.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "pci.h"
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#include "dev-ap9x-pci.h"
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#include "dev-gpio-buttons.h"
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#include "dev-eth.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-spi.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#include "nvram.h"
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#define DAP2695_GPIO_LED_GREEN_POWER 23
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#define DAP2695_GPIO_LED_RED_POWER 14
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#define DAP2695_GPIO_LED_WLAN_2G 13
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#define DAP2695_GPIO_BTN_RESET 17
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#define DAP2695_KEYS_POLL_INTERVAL 20 /* msecs */
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#define DAP2695_KEYS_DEBOUNCE_INTERVAL (3 * DAP2695_KEYS_POLL_INTERVAL)
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#define DAP2695_NVRAM_ADDR 0x1f040000
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#define DAP2695_NVRAM_SIZE 0x10000
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#define DAP2695_MAC0_OFFSET 1
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#define DAP2695_MAC1_OFFSET 2
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#define DAP2695_WMAC_CALDATA_OFFSET 0x1000
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static struct gpio_led dap2695_leds_gpio[] __initdata = {
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{
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.name = "d-link:green:power",
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.gpio = DAP2695_GPIO_LED_GREEN_POWER,
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.active_low = 1,
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},
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{
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.name = "d-link:red:power",
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.gpio = DAP2695_GPIO_LED_RED_POWER,
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.active_low = 1,
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},
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{
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.name = "d-link:green:wlan2g",
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.gpio = DAP2695_GPIO_LED_WLAN_2G,
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.active_low = 1,
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},
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};
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static struct gpio_keys_button dap2695_gpio_keys[] __initdata = {
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{
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.desc = "Soft reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = DAP2695_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DAP2695_GPIO_BTN_RESET,
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.active_low = 1,
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},
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};
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static struct ar8327_pad_cfg dap2695_ar8327_pad0_cfg = {
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.mode = AR8327_PAD_MAC_RGMII,
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.txclk_delay_en = true,
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.rxclk_delay_en = true,
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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.mac06_exchange_dis = true,
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};
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static struct ar8327_pad_cfg dap2695_ar8327_pad6_cfg = {
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.mode = AR8327_PAD_MAC_SGMII,
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.sgmii_delay_en = true,
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};
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static struct ar8327_platform_data dap2695_ar8327_data = {
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.pad0_cfg = &dap2695_ar8327_pad0_cfg,
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.pad6_cfg = &dap2695_ar8327_pad6_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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.port6_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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};
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static struct mdio_board_info dap2695_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &dap2695_ar8327_data,
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},
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};
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static struct flash_platform_data dap2695_flash_data = {
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.type = "mx25l12805d",
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};
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static void dap2695_get_mac(const char *name, char *mac)
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{
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u8 *nvram = (u8 *) KSEG1ADDR(DAP2695_NVRAM_ADDR);
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int err;
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err = ath79_nvram_parse_mac_addr(nvram, DAP2695_NVRAM_SIZE,
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name, mac);
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if (err)
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pr_err("no MAC address found for %s\n", name);
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}
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static void __init dap2695_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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u8 mac0[ETH_ALEN], mac1[ETH_ALEN], wmac0[ETH_ALEN];
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dap2695_get_mac("lanmac=", mac0);
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dap2695_get_mac("wanmac=", mac1);
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dap2695_get_mac("wlanmac=", wmac0);
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ath79_register_m25p80(&dap2695_flash_data);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(dap2695_leds_gpio),
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dap2695_leds_gpio);
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ath79_register_gpio_keys_polled(-1, DAP2695_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(dap2695_gpio_keys),
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dap2695_gpio_keys);
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ath79_register_wmac(art + DAP2695_WMAC_CALDATA_OFFSET, wmac0);
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ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
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ath79_register_mdio(0, 0x0);
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mdiobus_register_board_info(dap2695_mdio0_info,
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ARRAY_SIZE(dap2695_mdio0_info));
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/* GMAC0 is connected to the RGMII interface */
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ath79_init_mac(ath79_eth0_data.mac_addr, mac0, DAP2695_MAC0_OFFSET);
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_pll_data.pll_1000 = 0x56000000;
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ath79_register_eth(0);
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/* GMAC1 is connected to the SGMII interface */
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ath79_init_mac(ath79_eth1_data.mac_addr, mac1, DAP2695_MAC1_OFFSET);
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
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ath79_eth1_data.speed = SPEED_1000;
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ath79_eth1_data.duplex = DUPLEX_FULL;
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ath79_eth1_pll_data.pll_1000 = 0x03000101;
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ath79_register_eth(1);
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ath79_register_pci();
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}
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MIPS_MACHINE(ATH79_MACH_DAP_2695_A1, "DAP-2695-A1",
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"D-Link DAP-2695 rev. A1",
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dap2695_setup);
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