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1025 lines
22 KiB
Diff
1025 lines
22 KiB
Diff
From 19a0ac654994661f63f7c9e099ed91a1210af161 Mon Sep 17 00:00:00 2001
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From: Stefan Wahren <wahrenst@gmx.net>
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Date: Sun, 6 Oct 2019 15:41:25 +0200
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Subject: [PATCH] ARM: dts: Add minimal Raspberry Pi 4 support
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This adds minimal support for the new Raspberry Pi 4 without the
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fancy stuff like GENET, PCIe, xHCI, 40 bit DMA and V3D. The RPi 4 is
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available in 3 different variants (1, 2 and 4 GB RAM), so leave the memory
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size to zero and let the bootloader take care of it. The DWC2 is still
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usable as peripheral via the USB-C port.
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Other differences to the Raspberry Pi 3:
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- additional GIC 400 Interrupt controller
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- new thermal IP and HWRNG
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- additional MMC interface (emmc2)
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- additional UART, I2C, SPI and PWM interfaces
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- clock stretching bug in I2C IP has been fixed
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Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
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Acked-by: Eric Anholt <eric@anholt.net>
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Acked-by: Florian Fanelli <f.fainelli@gmail.com>
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---
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arch/arm/boot/dts/Makefile | 1 +
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arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 123 +++
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arch/arm/boot/dts/bcm2711.dtsi | 844 ++++++++++++++++++
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.../boot/dts/bcm283x-rpi-usb-peripheral.dtsi | 7 +
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4 files changed, 975 insertions(+)
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create mode 100644 arch/arm/boot/dts/bcm2711-rpi-4-b.dts
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create mode 100644 arch/arm/boot/dts/bcm2711.dtsi
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create mode 100644 arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -97,6 +97,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
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bcm2837-rpi-3-b.dtb \
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bcm2837-rpi-3-b-plus.dtb \
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bcm2837-rpi-cm3-io3.dtb \
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+ bcm2711-rpi-4-b.dtb \
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bcm2835-rpi-zero.dtb \
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bcm2835-rpi-zero-w.dtb
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dtb-$(CONFIG_ARCH_BCM_5301X) += \
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
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@@ -0,0 +1,123 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/dts-v1/;
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+#include "bcm2711.dtsi"
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+#include "bcm2835-rpi.dtsi"
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+#include "bcm283x-rpi-usb-peripheral.dtsi"
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+
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+/ {
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+ compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
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+ model = "Raspberry Pi 4 Model B";
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+
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+ chosen {
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+ /* 8250 auxiliary UART instead of pl011 */
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+ stdout-path = "serial1:115200n8";
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+ };
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+
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+ /* Will be filled by the bootloader */
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+ memory@0 {
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+ device_type = "memory";
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+ reg = <0 0 0>;
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+ };
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+
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+ leds {
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+ act {
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+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ pwr {
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+ label = "PWR";
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+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+
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+ wifi_pwrseq: wifi-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ sd_io_1v8_reg: sd_io_1v8_reg {
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+ compatible = "regulator-gpio";
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+ regulator-name = "vdd-sd-io";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-settling-time-us = <5000>;
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+ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
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+ states = <1800000 0x1
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+ 3300000 0x0>;
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+ status = "okay";
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+ };
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+};
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+
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+&firmware {
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+ expgpio: gpio {
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+ compatible = "raspberrypi,firmware-gpio";
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ gpio-line-names = "BT_ON",
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+ "WL_ON",
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+ "PWR_LED_OFF",
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+ "GLOBAL_RESET",
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+ "VDD_SD_IO_SEL",
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+ "CAM_GPIO",
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+ "",
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+ "";
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+ status = "okay";
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+ };
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+};
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+
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+&pwm1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
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+ status = "okay";
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+};
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+
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+/* SDHCI is used to control the SDIO for wireless */
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+&sdhci {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emmc_gpio34>;
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+ bus-width = <4>;
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+ non-removable;
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+ mmc-pwrseq = <&wifi_pwrseq>;
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+ status = "okay";
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+
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+ brcmf: wifi@1 {
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+ reg = <1>;
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+ compatible = "brcm,bcm4329-fmac";
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+ };
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+};
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+
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+/* EMMC2 is used to drive the SD card */
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+&emmc2 {
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+ vqmmc-supply = <&sd_io_1v8_reg>;
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+ broken-cd;
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+ status = "okay";
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+};
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+
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+/* uart0 communicates with the BT module */
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
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+ uart-has-rtscts;
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+ status = "okay";
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+
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+ bluetooth {
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+ compatible = "brcm,bcm43438-bt";
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+ max-speed = <2000000>;
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+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
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+ };
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+};
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+
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+/* uart1 is mapped to the pin header */
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+&uart1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart1_gpio14>;
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+ status = "okay";
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+};
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+
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+&vchiq {
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+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm2711.dtsi
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@@ -0,0 +1,844 @@
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+// SPDX-License-Identifier: GPL-2.0
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+#include "bcm283x.dtsi"
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+
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+#include <dt-bindings/interrupt-controller/arm-gic.h>
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+#include <dt-bindings/soc/bcm2835-pm.h>
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+
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+/ {
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+ compatible = "brcm,bcm2711";
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+
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+ #address-cells = <2>;
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+ #size-cells = <1>;
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+
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+ interrupt-parent = <&gicv2>;
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+
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+ soc {
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+ /*
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+ * Defined ranges:
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+ * Common BCM283x peripherals
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+ * BCM2711-specific peripherals
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+ * ARM-local peripherals
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+ */
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+ ranges = <0x7e000000 0x0 0xfe000000 0x01800000>,
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+ <0x7c000000 0x0 0xfc000000 0x02000000>,
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+ <0x40000000 0x0 0xff800000 0x00800000>;
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+ /* Emulate a contiguous 30-bit address range for DMA */
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+ dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>;
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+
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+ /*
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+ * This node is the provider for the enable-method for
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+ * bringing up secondary cores.
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+ */
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+ local_intc: local_intc@40000000 {
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+ compatible = "brcm,bcm2836-l1-intc";
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+ reg = <0x40000000 0x100>;
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+ };
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+
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+ gicv2: interrupt-controller@40041000 {
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+ interrupt-controller;
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+ #interrupt-cells = <3>;
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+ compatible = "arm,gic-400";
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+ reg = <0x40041000 0x1000>,
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+ <0x40042000 0x2000>,
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+ <0x40044000 0x2000>,
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+ <0x40046000 0x2000>;
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+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
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+ IRQ_TYPE_LEVEL_HIGH)>;
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+ };
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+
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+ dma: dma@7e007000 {
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+ compatible = "brcm,bcm2835-dma";
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+ reg = <0x7e007000 0xb00>;
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+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
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+ /* DMA lite 7 - 10 */
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+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "dma0",
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+ "dma1",
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+ "dma2",
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+ "dma3",
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+ "dma4",
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+ "dma5",
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+ "dma6",
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+ "dma7",
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+ "dma8",
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+ "dma9",
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+ "dma10";
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+ #dma-cells = <1>;
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+ brcm,dma-channel-mask = <0x07f5>;
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+ };
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+
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+ pm: watchdog@7e100000 {
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+ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
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+ #power-domain-cells = <1>;
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+ #reset-cells = <1>;
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+ reg = <0x7e100000 0x114>,
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+ <0x7e00a000 0x24>,
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+ <0x7ec11000 0x20>;
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+ clocks = <&clocks BCM2835_CLOCK_V3D>,
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+ <&clocks BCM2835_CLOCK_PERI_IMAGE>,
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+ <&clocks BCM2835_CLOCK_H264>,
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+ <&clocks BCM2835_CLOCK_ISP>;
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+ clock-names = "v3d", "peri_image", "h264", "isp";
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+ system-power-controller;
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+ };
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+
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+ rng@7e104000 {
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+ interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
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+
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+ /* RNG is incompatible with brcm,bcm2835-rng */
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+ status = "disabled";
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+ };
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+
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+ uart2: serial@7e201400 {
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+ compatible = "arm,pl011", "arm,primecell";
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+ reg = <0x7e201400 0x200>;
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+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clocks BCM2835_CLOCK_UART>,
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+ <&clocks BCM2835_CLOCK_VPU>;
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+ clock-names = "uartclk", "apb_pclk";
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+ arm,primecell-periphid = <0x00241011>;
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+ status = "disabled";
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+ };
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+
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+ uart3: serial@7e201600 {
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+ compatible = "arm,pl011", "arm,primecell";
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+ reg = <0x7e201600 0x200>;
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+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clocks BCM2835_CLOCK_UART>,
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+ <&clocks BCM2835_CLOCK_VPU>;
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+ clock-names = "uartclk", "apb_pclk";
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+ arm,primecell-periphid = <0x00241011>;
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+ status = "disabled";
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+ };
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+
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+ uart4: serial@7e201800 {
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+ compatible = "arm,pl011", "arm,primecell";
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+ reg = <0x7e201800 0x200>;
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+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clocks BCM2835_CLOCK_UART>,
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+ <&clocks BCM2835_CLOCK_VPU>;
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+ clock-names = "uartclk", "apb_pclk";
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+ arm,primecell-periphid = <0x00241011>;
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+ status = "disabled";
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+ };
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+
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+ uart5: serial@7e201a00 {
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+ compatible = "arm,pl011", "arm,primecell";
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+ reg = <0x7e201a00 0x200>;
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+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clocks BCM2835_CLOCK_UART>,
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+ <&clocks BCM2835_CLOCK_VPU>;
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+ clock-names = "uartclk", "apb_pclk";
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+ arm,primecell-periphid = <0x00241011>;
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+ status = "disabled";
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+ };
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+
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+ spi3: spi@7e204600 {
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+ compatible = "brcm,bcm2835-spi";
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+ reg = <0x7e204600 0x0200>;
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+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clocks BCM2835_CLOCK_VPU>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "disabled";
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+ };
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+
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+ spi4: spi@7e204800 {
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+ compatible = "brcm,bcm2835-spi";
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+ reg = <0x7e204800 0x0200>;
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+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clocks BCM2835_CLOCK_VPU>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "disabled";
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+ };
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+
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+ spi5: spi@7e204a00 {
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+ compatible = "brcm,bcm2835-spi";
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+ reg = <0x7e204a00 0x0200>;
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+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clocks BCM2835_CLOCK_VPU>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "disabled";
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+ };
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+
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+ spi6: spi@7e204c00 {
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+ compatible = "brcm,bcm2835-spi";
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+ reg = <0x7e204c00 0x0200>;
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+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clocks BCM2835_CLOCK_VPU>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "disabled";
|
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+ };
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+
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+ i2c3: i2c@7e205600 {
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+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
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+ reg = <0x7e205600 0x200>;
|
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+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
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+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
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+ #address-cells = <1>;
|
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+ #size-cells = <0>;
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+ status = "disabled";
|
|
+ };
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+
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+ i2c4: i2c@7e205800 {
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+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ reg = <0x7e205800 0x200>;
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
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+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
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+ status = "disabled";
|
|
+ };
|
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+
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+ i2c5: i2c@7e205a00 {
|
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+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ reg = <0x7e205a00 0x200>;
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
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+ i2c6: i2c@7e205c00 {
|
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+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ reg = <0x7e205c00 0x200>;
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
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|
+ pwm1: pwm@7e20c800 {
|
|
+ compatible = "brcm,bcm2835-pwm";
|
|
+ reg = <0x7e20c800 0x28>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_PWM>;
|
|
+ assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
|
|
+ assigned-clock-rates = <10000000>;
|
|
+ #pwm-cells = <2>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
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+ emmc2: emmc2@7e340000 {
|
|
+ compatible = "brcm,bcm2711-emmc2";
|
|
+ reg = <0x7e340000 0x100>;
|
|
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2711_CLOCK_EMMC2>;
|
|
+ status = "disabled";
|
|
+ };
|
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+
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+ hvs@7e400000 {
|
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+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ arm-pmu {
|
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+ compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3";
|
|
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
|
|
+ };
|
|
+
|
|
+ timer {
|
|
+ compatible = "arm,armv8-timer";
|
|
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_LOW)>,
|
|
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_LOW)>,
|
|
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_LOW)>,
|
|
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_LOW)>;
|
|
+ /* This only applies to the ARMv7 stub */
|
|
+ arm,cpu-registers-not-fw-configured;
|
|
+ };
|
|
+
|
|
+ cpus: cpus {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
|
|
+
|
|
+ cpu0: cpu@0 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a72";
|
|
+ reg = <0>;
|
|
+ enable-method = "spin-table";
|
|
+ cpu-release-addr = <0x0 0x000000d8>;
|
|
+ };
|
|
+
|
|
+ cpu1: cpu@1 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a72";
|
|
+ reg = <1>;
|
|
+ enable-method = "spin-table";
|
|
+ cpu-release-addr = <0x0 0x000000e0>;
|
|
+ };
|
|
+
|
|
+ cpu2: cpu@2 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a72";
|
|
+ reg = <2>;
|
|
+ enable-method = "spin-table";
|
|
+ cpu-release-addr = <0x0 0x000000e8>;
|
|
+ };
|
|
+
|
|
+ cpu3: cpu@3 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a72";
|
|
+ reg = <3>;
|
|
+ enable-method = "spin-table";
|
|
+ cpu-release-addr = <0x0 0x000000f0>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&clk_osc {
|
|
+ clock-frequency = <54000000>;
|
|
+};
|
|
+
|
|
+&clocks {
|
|
+ compatible = "brcm,bcm2711-cprman";
|
|
+};
|
|
+
|
|
+&cpu_thermal {
|
|
+ coefficients = <(-487) 410040>;
|
|
+};
|
|
+
|
|
+&dsi0 {
|
|
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&dsi1 {
|
|
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ compatible = "brcm,bcm2711-gpio";
|
|
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ gpclk0_gpio49: gpclk0_gpio49 {
|
|
+ pin-gpclk {
|
|
+ pins = "gpio49";
|
|
+ function = "alt1";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ gpclk1_gpio50: gpclk1_gpio50 {
|
|
+ pin-gpclk {
|
|
+ pins = "gpio50";
|
|
+ function = "alt1";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ gpclk2_gpio51: gpclk2_gpio51 {
|
|
+ pin-gpclk {
|
|
+ pins = "gpio51";
|
|
+ function = "alt1";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c0_gpio46: i2c0_gpio46 {
|
|
+ pin-sda {
|
|
+ function = "alt0";
|
|
+ pins = "gpio46";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt0";
|
|
+ pins = "gpio47";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c1_gpio46: i2c1_gpio46 {
|
|
+ pin-sda {
|
|
+ function = "alt1";
|
|
+ pins = "gpio46";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt1";
|
|
+ pins = "gpio47";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c3_gpio2: i2c3_gpio2 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio2";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio3";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c3_gpio4: i2c3_gpio4 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio5";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c4_gpio6: i2c4_gpio6 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio6";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio7";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c4_gpio8: i2c4_gpio8 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio8";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio9";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c5_gpio10: i2c5_gpio10 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio10";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio11";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c5_gpio12: i2c5_gpio12 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio12";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio13";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c6_gpio0: i2c6_gpio0 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio0";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio1";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c6_gpio22: i2c6_gpio22 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio22";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio23";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c_slave_gpio8: i2c_slave_gpio8 {
|
|
+ pins-i2c-slave {
|
|
+ pins = "gpio8",
|
|
+ "gpio9",
|
|
+ "gpio10",
|
|
+ "gpio11";
|
|
+ function = "alt3";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ jtag_gpio48: jtag_gpio48 {
|
|
+ pins-jtag {
|
|
+ pins = "gpio48",
|
|
+ "gpio49",
|
|
+ "gpio50",
|
|
+ "gpio51",
|
|
+ "gpio52",
|
|
+ "gpio53";
|
|
+ function = "alt4";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mii_gpio28: mii_gpio28 {
|
|
+ pins-mii {
|
|
+ pins = "gpio28",
|
|
+ "gpio29",
|
|
+ "gpio30",
|
|
+ "gpio31";
|
|
+ function = "alt4";
|
|
+ };
|
|
+ };
|
|
+ mii_gpio36: mii_gpio36 {
|
|
+ pins-mii {
|
|
+ pins = "gpio36",
|
|
+ "gpio37",
|
|
+ "gpio38",
|
|
+ "gpio39";
|
|
+ function = "alt5";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcm_gpio50: pcm_gpio50 {
|
|
+ pins-pcm {
|
|
+ pins = "gpio50",
|
|
+ "gpio51",
|
|
+ "gpio52",
|
|
+ "gpio53";
|
|
+ function = "alt2";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pwm0_0_gpio12: pwm0_0_gpio12 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio12";
|
|
+ function = "alt0";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm0_0_gpio18: pwm0_0_gpio18 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio18";
|
|
+ function = "alt5";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm1_0_gpio40: pwm1_0_gpio40 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio40";
|
|
+ function = "alt0";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm0_1_gpio13: pwm0_1_gpio13 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio13";
|
|
+ function = "alt0";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm0_1_gpio19: pwm0_1_gpio19 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio19";
|
|
+ function = "alt5";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm1_1_gpio41: pwm1_1_gpio41 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio41";
|
|
+ function = "alt0";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm0_1_gpio45: pwm0_1_gpio45 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio45";
|
|
+ function = "alt0";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm0_0_gpio52: pwm0_0_gpio52 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio52";
|
|
+ function = "alt1";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm0_1_gpio53: pwm0_1_gpio53 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio53";
|
|
+ function = "alt1";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rgmii_gpio35: rgmii_gpio35 {
|
|
+ pin-start-stop {
|
|
+ pins = "gpio35";
|
|
+ function = "alt4";
|
|
+ };
|
|
+ pin-rx-ok {
|
|
+ pins = "gpio36";
|
|
+ function = "alt4";
|
|
+ };
|
|
+ };
|
|
+ rgmii_irq_gpio34: rgmii_irq_gpio34 {
|
|
+ pin-irq {
|
|
+ pins = "gpio34";
|
|
+ function = "alt5";
|
|
+ };
|
|
+ };
|
|
+ rgmii_irq_gpio39: rgmii_irq_gpio39 {
|
|
+ pin-irq {
|
|
+ pins = "gpio39";
|
|
+ function = "alt4";
|
|
+ };
|
|
+ };
|
|
+ rgmii_mdio_gpio28: rgmii_mdio_gpio28 {
|
|
+ pins-mdio {
|
|
+ pins = "gpio28",
|
|
+ "gpio29";
|
|
+ function = "alt5";
|
|
+ };
|
|
+ };
|
|
+ rgmii_mdio_gpio37: rgmii_mdio_gpio37 {
|
|
+ pins-mdio {
|
|
+ pins = "gpio37",
|
|
+ "gpio38";
|
|
+ function = "alt4";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spi0_gpio46: spi0_gpio46 {
|
|
+ pins-spi {
|
|
+ pins = "gpio46",
|
|
+ "gpio47",
|
|
+ "gpio48",
|
|
+ "gpio49";
|
|
+ function = "alt2";
|
|
+ };
|
|
+ };
|
|
+ spi2_gpio46: spi2_gpio46 {
|
|
+ pins-spi {
|
|
+ pins = "gpio46",
|
|
+ "gpio47",
|
|
+ "gpio48",
|
|
+ "gpio49",
|
|
+ "gpio50";
|
|
+ function = "alt5";
|
|
+ };
|
|
+ };
|
|
+ spi3_gpio0: spi3_gpio0 {
|
|
+ pins-spi {
|
|
+ pins = "gpio0",
|
|
+ "gpio1",
|
|
+ "gpio2",
|
|
+ "gpio3";
|
|
+ function = "alt3";
|
|
+ };
|
|
+ };
|
|
+ spi4_gpio4: spi4_gpio4 {
|
|
+ pins-spi {
|
|
+ pins = "gpio4",
|
|
+ "gpio5",
|
|
+ "gpio6",
|
|
+ "gpio7";
|
|
+ function = "alt3";
|
|
+ };
|
|
+ };
|
|
+ spi5_gpio12: spi5_gpio12 {
|
|
+ pins-spi {
|
|
+ pins = "gpio12",
|
|
+ "gpio13",
|
|
+ "gpio14",
|
|
+ "gpio15";
|
|
+ function = "alt3";
|
|
+ };
|
|
+ };
|
|
+ spi6_gpio18: spi6_gpio18 {
|
|
+ pins-spi {
|
|
+ pins = "gpio18",
|
|
+ "gpio19",
|
|
+ "gpio20",
|
|
+ "gpio21";
|
|
+ function = "alt3";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ uart2_gpio0: uart2_gpio0 {
|
|
+ pin-tx {
|
|
+ pins = "gpio0";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin-rx {
|
|
+ pins = "gpio1";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 {
|
|
+ pin-cts {
|
|
+ pins = "gpio2";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-rts {
|
|
+ pins = "gpio3";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ uart3_gpio4: uart3_gpio4 {
|
|
+ pin-tx {
|
|
+ pins = "gpio4";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin-rx {
|
|
+ pins = "gpio5";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 {
|
|
+ pin-cts {
|
|
+ pins = "gpio6";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-rts {
|
|
+ pins = "gpio7";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ uart4_gpio8: uart4_gpio8 {
|
|
+ pin-tx {
|
|
+ pins = "gpio8";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin-rx {
|
|
+ pins = "gpio9";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 {
|
|
+ pin-cts {
|
|
+ pins = "gpio10";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-rts {
|
|
+ pins = "gpio11";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ uart5_gpio12: uart5_gpio12 {
|
|
+ pin-tx {
|
|
+ pins = "gpio12";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin-rx {
|
|
+ pins = "gpio13";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 {
|
|
+ pin-cts {
|
|
+ pins = "gpio14";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-rts {
|
|
+ pins = "gpio15";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&mailbox {
|
|
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&sdhci {
|
|
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&sdhost {
|
|
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&spi {
|
|
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&spi1 {
|
|
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&spi2 {
|
|
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&system_timer {
|
|
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&txp {
|
|
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&usb {
|
|
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&vec {
|
|
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
|
|
@@ -0,0 +1,7 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+&usb {
|
|
+ dr_mode = "peripheral";
|
|
+ g-rx-fifo-size = <256>;
|
|
+ g-np-tx-fifo-size = <32>;
|
|
+ g-tx-fifo-size = <256 256 512 512 512 768 768>;
|
|
+};
|