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147 lines
5.1 KiB
C
147 lines
5.1 KiB
C
/*
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* (C) Copyright 2003-2005
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* This file contains the configuration parameters for the Danube reference board.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_MIPS32 1 /* MIPS32 CPU compatible */
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#define CONFIG_MIPS24KEC 1 /* MIPS 24KEc CPU core */
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#define CONFIG_DANUBE 1 /* in a Danube/Twinpass Chip */
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#define CONFIG_SYS_MIPS_MULTI_CPU 1 /* This is a multi cpu system */
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#define CONFIG_USE_DDR_RAM
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#define CONFIG_FLASH_CFI_DRIVER 1
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#define CONFIG_SYS_INIT_RAM_LOCK_MIPS
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#ifdef CONFIG_SYS_RAMBOOT
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//#warning CONFIG_SYS_RAMBOOT
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#else /* CONFIG_SYS_RAMBOOT */
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#define CONFIG_SYS_EBU_BOOT
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#define INFINEON_EBU_BOOTCFG 0x688C688C /* CMULT = 8 for 150 MHz */
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#endif /* CONFIG_SYS_RAMBOOT */
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#if 1
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#ifndef CPU_CLOCK_RATE
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#define CPU_CLOCK_RATE (ifx_get_cpuclk())
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#endif
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#endif
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#undef CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
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/*
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* Include common defines/options for all Infineon boards
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*/
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#include "ifx-common.h"
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#undef CONFIG_EXTRA_ENV_SETTINGS
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"ram_addr=0x80500000\0" \
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"kernel_addr=0xb0020000\0" \
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"flashargs=setenv bootargs rootfstype=squashfs,jffs2\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath} \0" \
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"addip=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off\0" \
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"addmisc=setenv bootargs ${bootargs} init=/etc/preinit " \
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"console=ttyS1,115200 ethaddr=${ethaddr} " \
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"${mtdparts}\0" \
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"flash_flash=run flashargs addip addmisc;" \
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"bootm ${kernel_addr}\0" \
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"flash_nfs=run nfsargs addip addmisc;bootm ${kernel_addr}\0" \
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"net_flash=run load_kernel flashargs addip addmisc;" \
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"bootm ${ram_addr}\0" \
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"net_nfs=run load_kernel nfsargs addip addmisc;" \
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"bootm ${ram_addr}\0" \
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"load_kernel=tftp ${ram_addr} " \
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"${tftppath}openwrt-ifxmips-uImage\0" \
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"update_uboot=tftp 0x80500000 ${tftppath}u-boot-" CONFIG_ARCADYAN ".bin;era 0xb0000000 +${filesize};" \
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"cp.b 0x80500000 0xb0000000 ${filesize}\0" \
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"update_openwrt=tftp ${ram_addr} " \
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"${tftppath}" CONFIG_ARCADYAN "-squashfs.image;" \
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"era ${kernel_addr} +${filesize};" \
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"cp.b ${ram_addr} ${kernel_addr} ${filesize}\0"
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/*
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* Cache Configuration (cpu/chip specific, Danube)
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*/
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#define CONFIG_SYS_DCACHE_SIZE 16384
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#define CONFIG_SYS_ICACHE_SIZE 16384
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#define CONFIG_SYS_CACHELINE_SIZE 32
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#define CONFIG_SYS_MIPS_CACHE_OPER_MODE CONF_CM_CACHABLE_NO_WA
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#define CONFIG_NET_MULTI
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#define CONFIG_IFX_ETOP
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//#define CLK_OUT2_25MHZ
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#define CONFIG_MII
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#undef CONFIG_CMD_MII
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#define CONFIG_IFX_ASC
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#ifdef CONFIG_USE_ASC0
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#define CONFIG_SYS_IFX_ASC_BASE 0x1E100400
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#else
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#define CONFIG_SYS_IFX_ASC_BASE 0x1E100C00
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#endif
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#ifdef CONFIG_SYS_RAMBOOT
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/* Configuration of EBU: */
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/* starting address from 0xb0000000 */
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/* make the flash available from RAM boot */
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# define CONFIG_EBU_ADDSEL0 0x10000031
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# define CONFIG_EBU_BUSCON0 0x0001D7FF
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# define CONFIG_EBU_ADDSEL1 0x14000001
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# define CONFIG_EBU_BUSCON1 0x4041D7FD
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#endif
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#define CONFIG_CMD_HTTPD /* enable upgrade via HTTPD */
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#define CONFIG_IPADDR 192.168.1.1
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#define CONFIG_SERVERIP 192.168.1.101
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#define CONFIG_GATEWAYIP 192.168.1.254
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_ROOTPATH "/export"
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#ifdef CONFIG_BOOTSTRAP
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#define CONFIG_BOOTSTRAP_BASE CONFIG_BOOTSTRAP_TEXT_BASE
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#define CONFIG_BOOTSTRAP_BAUDRATE CONFIG_BAUDRATE
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_BOOTSTRAP_LZMA
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//#define CONFIG_BOOTSTRAP_SERIAL
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#endif
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#endif /* __CONFIG_H */
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