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39 lines
1.5 KiB
Diff
39 lines
1.5 KiB
Diff
From bc183b1da77d6e2fbc801327a1811d446d34f54f Mon Sep 17 00:00:00 2001
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From: Christian Lamparter <chunkeey@gmail.com>
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Date: Wed, 31 Oct 2018 22:20:46 +0100
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Subject: [PATCH 1/2] dt-bindings: add protection control property
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This patch adds the protection control property and
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dt-binding definitions for the DesignWare AHB Central
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Direct Memory Access Controller.
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Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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---
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include/dt-bindings/dma/dw-dmac.h | 20 +++++++++++++++++++
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1 files changed, 20 insertions(+), 0 deletion(-)
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create mode 100644 include/dt-bindings/dma/dw-dmac.h
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--- /dev/null
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+++ b/include/dt-bindings/dma/dw-dmac.h
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@@ -0,0 +1,20 @@
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+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
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+
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+#ifndef __DT_BINDINGS_DMA_DW_DMAC_H__
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+#define __DT_BINDINGS_DMA_DW_DMAC_H__
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+
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+#define DW_DMAC_CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */
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+#define DW_DMAC_CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */
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+#define DW_DMAC_CHAN_PRIORITY_ASCENDING 0 /* chan0 highest */
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+#define DW_DMAC_CHAN_PRIORITY_DESCENDING 1 /* chan7 highest */
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+
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+/*
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+ * Protection Control bits provide protection against illegal transactions.
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+ * The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals.
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+ * The AHB HPROT[0] bit is hardwired to 1: Data Access.
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+ */
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+#define DW_DMAC_HPROT1_PRIVILEGED_MODE (1 << 0) /* Privileged Mode */
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+#define DW_DMAC_HPROT2_BUFFERABLE (1 << 1) /* DMA is bufferable */
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+#define DW_DMAC_HPROT3_CACHEABLE (1 << 2) /* DMA is cacheable */
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+
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+#endif /* __DT_BINDINGS_DMA_DW_DMAC_H__ */
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