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87 lines
2.9 KiB
Diff
87 lines
2.9 KiB
Diff
diff -urN linux-2.6.22/arch/mips/Kconfig linux-2.6.22.new/arch/mips/Kconfig
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--- linux-2.6.22/arch/mips/Kconfig 2007-07-09 01:32:17.000000000 +0200
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+++ linux-2.6.22.new/arch/mips/Kconfig 2007-07-11 02:34:51.000000000 +0200
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@@ -15,6 +15,21 @@
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prompt "System type"
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default SGI_IP22
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+config AR7
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+ bool "Texas Instruments AR7"
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+ select BOOT_ELF32
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+ select DMA_NONCOHERENT
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+ select HW_HAS_PCI
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+ select IRQ_CPU
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+ select SWAP_IO_SPACE
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+ select SYS_HAS_CPU_MIPS32_R1
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+ select SYS_HAS_EARLY_PRINTK
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+ select SYS_SUPPORTS_32BIT_KERNEL
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+ select SYS_SUPPORTS_KGDB
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+ select SYS_SUPPORTS_LITTLE_ENDIAN
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+ select SYS_SUPPORTS_BIG_ENDIAN
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+ select GENERIC_GPIO
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+
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config MACH_ALCHEMY
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bool "Alchemy processor based machines"
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diff -urN linux-2.6.22/arch/mips/kernel/traps.c linux-2.6.22.new/arch/mips/kernel/traps.c
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--- linux-2.6.22/arch/mips/kernel/traps.c 2007-07-09 01:32:17.000000000 +0200
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+++ linux-2.6.22.new/arch/mips/kernel/traps.c 2007-07-11 02:32:39.000000000 +0200
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@@ -1075,9 +1075,23 @@ void *set_except_vector(int n, void *addr)
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exception_handlers[n] = handler;
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if (n == 0 && cpu_has_divec) {
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+#ifdef CONFIG_AR7
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+ /* lui k0, 0x0000 */
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+ *(volatile u32 *)(ebase + 0x200) =
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+ 0x3c1a0000 | (handler >> 16);
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+ /* ori k0, 0x0000 */
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+ *(volatile u32 *)(ebase + 0x204) =
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+ 0x375a0000 | (handler & 0xffff);
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+ /* jr k0 */
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+ *(volatile u32 *)(ebase + 0x208) = 0x03400008;
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+ /* nop */
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+ *(volatile u32 *)(ebase + 0x20C) = 0x00000000;
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+ flush_icache_range(ebase + 0x200, ebase + 0x210);
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+#else
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*(volatile u32 *)(ebase + 0x200) = 0x08000000 |
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(0x03ffffff & (handler >> 2));
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flush_icache_range(ebase + 0x200, ebase + 0x204);
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+#endif
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}
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return (void *)old_handler;
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}
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diff -urN linux-2.6.22/arch/mips/Makefile linux-2.6.22.new/arch/mips/Makefile
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--- linux-2.6.22/arch/mips/Makefile 2007-07-09 01:32:17.000000000 +0200
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+++ linux-2.6.22.new/arch/mips/Makefile 2007-07-11 02:32:39.000000000 +0200
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@@ -158,6 +158,13 @@
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#
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#
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+# Texas Instruments AR7
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+#
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+core-$(CONFIG_AR7) += arch/mips/ar7/
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+cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7
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+load-$(CONFIG_AR7) += 0xffffffff94100000
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+
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+#
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# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
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#
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core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
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diff -urN linux-2.6.22.4/include/asm-mips/page.h linux-2.6.22.4.new/include/asm-mips/page.h
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--- linux-2.6.22.4/include/asm-mips/page.h 2007-08-21 12:33:06.000000000 +0800
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+++ linux-2.6.22.4.new/include/asm-mips/page.h 2007-09-13 15:13:00.000000000 +0800
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@@ -187,8 +187,10 @@
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#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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-#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
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-#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
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+#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \
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+ PHYS_OFFSET)
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+#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \
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+ PHYS_OFFSET)
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#include <asm-generic/memory_model.h>
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#include <asm-generic/page.h>
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