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580 lines
15 KiB
Diff
580 lines
15 KiB
Diff
From 7d12709544b8b3fb9727a34a664b8380e1e3493a Mon Sep 17 00:00:00 2001
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From: Sricharan R <sricharan@codeaurora.org>
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Date: Thu, 25 Jul 2019 12:41:31 +0200
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Subject: [PATCH] cpufreq: qcom: Re-organise kryo cpufreq to use it for other
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nvmem based qcom socs
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The kryo cpufreq driver reads the nvmem cell and uses that data to
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populate the opps. There are other qcom cpufreq socs like krait which
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does similar thing. Except for the interpretation of the read data,
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rest of the driver is same for both the cases. So pull the common things
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out for reuse.
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Signed-off-by: Sricharan R <sricharan@codeaurora.org>
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[niklas.cassel@linaro.org: split dt-binding into a separate patch and
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do not rename the compatible string. Update MAINTAINERS file.]
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Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
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Reviewed-by: Ilia Lin <ilia.lin@kernel.org>
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Reviewed-by: Stephen Boyd <sboyd@kernel.org>
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Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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---
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MAINTAINERS | 4 +-
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drivers/cpufreq/Kconfig.arm | 4 +-
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drivers/cpufreq/Makefile | 2 +-
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...om-cpufreq-kryo.c => qcom-cpufreq-nvmem.c} | 122 +++++++++++-------
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4 files changed, 78 insertions(+), 54 deletions(-)
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rename drivers/cpufreq/{qcom-cpufreq-kryo.c => qcom-cpufreq-nvmem.c} (69%)
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--- a/drivers/cpufreq/Kconfig.arm
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+++ b/drivers/cpufreq/Kconfig.arm
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@@ -110,8 +110,8 @@ config ARM_OMAP2PLUS_CPUFREQ
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depends on ARCH_OMAP2PLUS
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default ARCH_OMAP2PLUS
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-config ARM_QCOM_CPUFREQ_KRYO
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- tristate "Qualcomm Kryo based CPUFreq"
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+config ARM_QCOM_CPUFREQ_NVMEM
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+ tristate "Qualcomm nvmem based CPUFreq"
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depends on ARM64
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depends on QCOM_QFPROM
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depends on QCOM_SMEM
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--- a/drivers/cpufreq/Makefile
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+++ b/drivers/cpufreq/Makefile
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@@ -64,7 +64,7 @@ obj-$(CONFIG_MACH_MVEBU_V7) += mvebu-cp
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obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o
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obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o
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obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o
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-obj-$(CONFIG_ARM_QCOM_CPUFREQ_KRYO) += qcom-cpufreq-kryo.o
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+obj-$(CONFIG_ARM_QCOM_CPUFREQ_NVMEM) += qcom-cpufreq-nvmem.o
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obj-$(CONFIG_ARM_S3C2410_CPUFREQ) += s3c2410-cpufreq.o
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obj-$(CONFIG_ARM_S3C2412_CPUFREQ) += s3c2412-cpufreq.o
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obj-$(CONFIG_ARM_S3C2416_CPUFREQ) += s3c2416-cpufreq.o
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--- a/drivers/cpufreq/qcom-cpufreq-kryo.c
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+++ /dev/null
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@@ -1,249 +0,0 @@
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-// SPDX-License-Identifier: GPL-2.0
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-/*
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- * Copyright (c) 2018, The Linux Foundation. All rights reserved.
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- */
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-
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-/*
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- * In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
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- * the CPU frequency subset and voltage value of each OPP varies
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- * based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
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- * defines the voltage and frequency value based on the msm-id in SMEM
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- * and speedbin blown in the efuse combination.
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- * The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC
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- * to provide the OPP framework with required information.
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- * This is used to determine the voltage and frequency value for each OPP of
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- * operating-points-v2 table when it is parsed by the OPP framework.
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- */
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-
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-#include <linux/cpu.h>
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-#include <linux/err.h>
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-#include <linux/init.h>
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-#include <linux/kernel.h>
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-#include <linux/module.h>
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-#include <linux/nvmem-consumer.h>
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-#include <linux/of.h>
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-#include <linux/platform_device.h>
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-#include <linux/pm_opp.h>
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-#include <linux/slab.h>
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-#include <linux/soc/qcom/smem.h>
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-
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-#define MSM_ID_SMEM 137
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-
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-enum _msm_id {
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- MSM8996V3 = 0xF6ul,
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- APQ8096V3 = 0x123ul,
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- MSM8996SG = 0x131ul,
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- APQ8096SG = 0x138ul,
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-};
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-
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-enum _msm8996_version {
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- MSM8996_V3,
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- MSM8996_SG,
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- NUM_OF_MSM8996_VERSIONS,
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-};
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-
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-static struct platform_device *cpufreq_dt_pdev, *kryo_cpufreq_pdev;
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-
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-static enum _msm8996_version qcom_cpufreq_kryo_get_msm_id(void)
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-{
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- size_t len;
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- u32 *msm_id;
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- enum _msm8996_version version;
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-
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- msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
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- if (IS_ERR(msm_id))
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- return NUM_OF_MSM8996_VERSIONS;
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-
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- /* The first 4 bytes are format, next to them is the actual msm-id */
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- msm_id++;
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-
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- switch ((enum _msm_id)*msm_id) {
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- case MSM8996V3:
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- case APQ8096V3:
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- version = MSM8996_V3;
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- break;
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- case MSM8996SG:
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- case APQ8096SG:
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- version = MSM8996_SG;
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- break;
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- default:
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- version = NUM_OF_MSM8996_VERSIONS;
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- }
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-
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- return version;
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-}
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-
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-static int qcom_cpufreq_kryo_probe(struct platform_device *pdev)
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-{
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- struct opp_table **opp_tables;
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- enum _msm8996_version msm8996_version;
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- struct nvmem_cell *speedbin_nvmem;
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- struct device_node *np;
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- struct device *cpu_dev;
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- unsigned cpu;
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- u8 *speedbin;
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- u32 versions;
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- size_t len;
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- int ret;
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-
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- cpu_dev = get_cpu_device(0);
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- if (!cpu_dev)
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- return -ENODEV;
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-
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- msm8996_version = qcom_cpufreq_kryo_get_msm_id();
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- if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
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- dev_err(cpu_dev, "Not Snapdragon 820/821!");
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- return -ENODEV;
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- }
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-
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- np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
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- if (!np)
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- return -ENOENT;
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-
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- ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
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- if (!ret) {
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- of_node_put(np);
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- return -ENOENT;
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- }
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-
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- speedbin_nvmem = of_nvmem_cell_get(np, NULL);
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- of_node_put(np);
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- if (IS_ERR(speedbin_nvmem)) {
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- if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER)
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- dev_err(cpu_dev, "Could not get nvmem cell: %ld\n",
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- PTR_ERR(speedbin_nvmem));
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- return PTR_ERR(speedbin_nvmem);
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- }
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-
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- speedbin = nvmem_cell_read(speedbin_nvmem, &len);
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- nvmem_cell_put(speedbin_nvmem);
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- if (IS_ERR(speedbin))
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- return PTR_ERR(speedbin);
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-
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- switch (msm8996_version) {
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- case MSM8996_V3:
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- versions = 1 << (unsigned int)(*speedbin);
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- break;
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- case MSM8996_SG:
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- versions = 1 << ((unsigned int)(*speedbin) + 4);
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- break;
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- default:
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- BUG();
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- break;
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- }
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- kfree(speedbin);
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-
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- opp_tables = kcalloc(num_possible_cpus(), sizeof(*opp_tables), GFP_KERNEL);
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- if (!opp_tables)
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- return -ENOMEM;
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-
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- for_each_possible_cpu(cpu) {
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- cpu_dev = get_cpu_device(cpu);
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- if (NULL == cpu_dev) {
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- ret = -ENODEV;
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- goto free_opp;
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- }
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-
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- opp_tables[cpu] = dev_pm_opp_set_supported_hw(cpu_dev,
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- &versions, 1);
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- if (IS_ERR(opp_tables[cpu])) {
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- ret = PTR_ERR(opp_tables[cpu]);
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- dev_err(cpu_dev, "Failed to set supported hardware\n");
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- goto free_opp;
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- }
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- }
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-
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- cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
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- NULL, 0);
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- if (!IS_ERR(cpufreq_dt_pdev)) {
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- platform_set_drvdata(pdev, opp_tables);
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- return 0;
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- }
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-
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- ret = PTR_ERR(cpufreq_dt_pdev);
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- dev_err(cpu_dev, "Failed to register platform device\n");
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-
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-free_opp:
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- for_each_possible_cpu(cpu) {
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- if (IS_ERR_OR_NULL(opp_tables[cpu]))
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- break;
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- dev_pm_opp_put_supported_hw(opp_tables[cpu]);
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- }
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- kfree(opp_tables);
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-
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- return ret;
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-}
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-
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-static int qcom_cpufreq_kryo_remove(struct platform_device *pdev)
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-{
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- struct opp_table **opp_tables = platform_get_drvdata(pdev);
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- unsigned int cpu;
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-
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- platform_device_unregister(cpufreq_dt_pdev);
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-
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- for_each_possible_cpu(cpu)
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- dev_pm_opp_put_supported_hw(opp_tables[cpu]);
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-
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- kfree(opp_tables);
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-
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- return 0;
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-}
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-
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-static struct platform_driver qcom_cpufreq_kryo_driver = {
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- .probe = qcom_cpufreq_kryo_probe,
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- .remove = qcom_cpufreq_kryo_remove,
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- .driver = {
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- .name = "qcom-cpufreq-kryo",
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- },
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-};
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-
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-static const struct of_device_id qcom_cpufreq_kryo_match_list[] __initconst = {
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- { .compatible = "qcom,apq8096", },
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- { .compatible = "qcom,msm8996", },
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- {}
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-};
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-
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-/*
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- * Since the driver depends on smem and nvmem drivers, which may
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- * return EPROBE_DEFER, all the real activity is done in the probe,
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- * which may be defered as well. The init here is only registering
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- * the driver and the platform device.
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- */
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-static int __init qcom_cpufreq_kryo_init(void)
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-{
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- struct device_node *np = of_find_node_by_path("/");
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- const struct of_device_id *match;
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- int ret;
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-
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- if (!np)
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- return -ENODEV;
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-
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- match = of_match_node(qcom_cpufreq_kryo_match_list, np);
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- of_node_put(np);
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- if (!match)
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- return -ENODEV;
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-
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- ret = platform_driver_register(&qcom_cpufreq_kryo_driver);
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- if (unlikely(ret < 0))
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- return ret;
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-
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- kryo_cpufreq_pdev = platform_device_register_simple(
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- "qcom-cpufreq-kryo", -1, NULL, 0);
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- ret = PTR_ERR_OR_ZERO(kryo_cpufreq_pdev);
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- if (0 == ret)
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- return 0;
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-
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- platform_driver_unregister(&qcom_cpufreq_kryo_driver);
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- return ret;
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-}
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-module_init(qcom_cpufreq_kryo_init);
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-
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-static void __exit qcom_cpufreq_kryo_exit(void)
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-{
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- platform_device_unregister(kryo_cpufreq_pdev);
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- platform_driver_unregister(&qcom_cpufreq_kryo_driver);
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-}
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-module_exit(qcom_cpufreq_kryo_exit);
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-
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-MODULE_DESCRIPTION("Qualcomm Technologies, Inc. Kryo CPUfreq driver");
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-MODULE_LICENSE("GPL v2");
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--- /dev/null
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+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
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@@ -0,0 +1,273 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
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+ */
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+
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+/*
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+ * In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
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+ * the CPU frequency subset and voltage value of each OPP varies
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+ * based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
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+ * defines the voltage and frequency value based on the msm-id in SMEM
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+ * and speedbin blown in the efuse combination.
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+ * The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
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+ * to provide the OPP framework with required information.
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+ * This is used to determine the voltage and frequency value for each OPP of
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+ * operating-points-v2 table when it is parsed by the OPP framework.
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+ */
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+
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+#include <linux/cpu.h>
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+#include <linux/err.h>
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+#include <linux/init.h>
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/nvmem-consumer.h>
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+#include <linux/of.h>
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+#include <linux/of_device.h>
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+#include <linux/platform_device.h>
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+#include <linux/pm_opp.h>
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+#include <linux/slab.h>
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+#include <linux/soc/qcom/smem.h>
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+
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+#define MSM_ID_SMEM 137
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+
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+enum _msm_id {
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+ MSM8996V3 = 0xF6ul,
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+ APQ8096V3 = 0x123ul,
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+ MSM8996SG = 0x131ul,
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+ APQ8096SG = 0x138ul,
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+};
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+
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+enum _msm8996_version {
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+ MSM8996_V3,
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+ MSM8996_SG,
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+ NUM_OF_MSM8996_VERSIONS,
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+};
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+
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+static struct platform_device *cpufreq_dt_pdev, *cpufreq_pdev;
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+
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+static enum _msm8996_version qcom_cpufreq_get_msm_id(void)
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+{
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+ size_t len;
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+ u32 *msm_id;
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+ enum _msm8996_version version;
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+
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+ msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
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+ if (IS_ERR(msm_id))
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+ return NUM_OF_MSM8996_VERSIONS;
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+
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+ /* The first 4 bytes are format, next to them is the actual msm-id */
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+ msm_id++;
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+
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+ switch ((enum _msm_id)*msm_id) {
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+ case MSM8996V3:
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+ case APQ8096V3:
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+ version = MSM8996_V3;
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+ break;
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+ case MSM8996SG:
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+ case APQ8096SG:
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+ version = MSM8996_SG;
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+ break;
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+ default:
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+ version = NUM_OF_MSM8996_VERSIONS;
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+ }
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+
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+ return version;
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+}
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+
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+static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
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+ struct nvmem_cell *speedbin_nvmem,
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+ u32 *versions)
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+{
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+ size_t len;
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+ u8 *speedbin;
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+ enum _msm8996_version msm8996_version;
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+
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+ msm8996_version = qcom_cpufreq_get_msm_id();
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+ if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
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+ dev_err(cpu_dev, "Not Snapdragon 820/821!");
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+ return -ENODEV;
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+ }
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+
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+ speedbin = nvmem_cell_read(speedbin_nvmem, &len);
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+ if (IS_ERR(speedbin))
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+ return PTR_ERR(speedbin);
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+
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+ switch (msm8996_version) {
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+ case MSM8996_V3:
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+ *versions = 1 << (unsigned int)(*speedbin);
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+ break;
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+ case MSM8996_SG:
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+ *versions = 1 << ((unsigned int)(*speedbin) + 4);
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+ break;
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+ default:
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+ BUG();
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+ break;
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+ }
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+
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+ kfree(speedbin);
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+ return 0;
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+}
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+
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+static int qcom_cpufreq_probe(struct platform_device *pdev)
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+{
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+ struct opp_table **opp_tables;
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+ int (*get_version)(struct device *cpu_dev,
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+ struct nvmem_cell *speedbin_nvmem,
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+ u32 *versions);
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+ struct nvmem_cell *speedbin_nvmem;
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+ struct device_node *np;
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+ struct device *cpu_dev;
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+ unsigned cpu;
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+ u32 versions;
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+ const struct of_device_id *match;
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+ int ret;
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+
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+ cpu_dev = get_cpu_device(0);
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+ if (!cpu_dev)
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+ return -ENODEV;
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+
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+ match = pdev->dev.platform_data;
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+ get_version = match->data;
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+ if (!get_version)
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+ return -ENODEV;
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+
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+ np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
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+ if (!np)
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+ return -ENOENT;
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+
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+ ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
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+ if (!ret) {
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+ of_node_put(np);
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+ return -ENOENT;
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+ }
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+
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+ speedbin_nvmem = of_nvmem_cell_get(np, NULL);
|
|
+ of_node_put(np);
|
|
+ if (IS_ERR(speedbin_nvmem)) {
|
|
+ if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER)
|
|
+ dev_err(cpu_dev, "Could not get nvmem cell: %ld\n",
|
|
+ PTR_ERR(speedbin_nvmem));
|
|
+ return PTR_ERR(speedbin_nvmem);
|
|
+ }
|
|
+
|
|
+ ret = get_version(cpu_dev, speedbin_nvmem, &versions);
|
|
+ nvmem_cell_put(speedbin_nvmem);
|
|
+ if (ret)
|
|
+ return ret;
|
|
+
|
|
+ opp_tables = kcalloc(num_possible_cpus(), sizeof(*opp_tables), GFP_KERNEL);
|
|
+ if (!opp_tables)
|
|
+ return -ENOMEM;
|
|
+
|
|
+ for_each_possible_cpu(cpu) {
|
|
+ cpu_dev = get_cpu_device(cpu);
|
|
+ if (NULL == cpu_dev) {
|
|
+ ret = -ENODEV;
|
|
+ goto free_opp;
|
|
+ }
|
|
+
|
|
+ opp_tables[cpu] = dev_pm_opp_set_supported_hw(cpu_dev,
|
|
+ &versions, 1);
|
|
+ if (IS_ERR(opp_tables[cpu])) {
|
|
+ ret = PTR_ERR(opp_tables[cpu]);
|
|
+ dev_err(cpu_dev, "Failed to set supported hardware\n");
|
|
+ goto free_opp;
|
|
+ }
|
|
+ }
|
|
+
|
|
+ cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
|
|
+ NULL, 0);
|
|
+ if (!IS_ERR(cpufreq_dt_pdev)) {
|
|
+ platform_set_drvdata(pdev, opp_tables);
|
|
+ return 0;
|
|
+ }
|
|
+
|
|
+ ret = PTR_ERR(cpufreq_dt_pdev);
|
|
+ dev_err(cpu_dev, "Failed to register platform device\n");
|
|
+
|
|
+free_opp:
|
|
+ for_each_possible_cpu(cpu) {
|
|
+ if (IS_ERR_OR_NULL(opp_tables[cpu]))
|
|
+ break;
|
|
+ dev_pm_opp_put_supported_hw(opp_tables[cpu]);
|
|
+ }
|
|
+ kfree(opp_tables);
|
|
+
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+static int qcom_cpufreq_remove(struct platform_device *pdev)
|
|
+{
|
|
+ struct opp_table **opp_tables = platform_get_drvdata(pdev);
|
|
+ unsigned int cpu;
|
|
+
|
|
+ platform_device_unregister(cpufreq_dt_pdev);
|
|
+
|
|
+ for_each_possible_cpu(cpu)
|
|
+ dev_pm_opp_put_supported_hw(opp_tables[cpu]);
|
|
+
|
|
+ kfree(opp_tables);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static struct platform_driver qcom_cpufreq_driver = {
|
|
+ .probe = qcom_cpufreq_probe,
|
|
+ .remove = qcom_cpufreq_remove,
|
|
+ .driver = {
|
|
+ .name = "qcom-cpufreq-nvmem",
|
|
+ },
|
|
+};
|
|
+
|
|
+static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
|
|
+ { .compatible = "qcom,apq8096",
|
|
+ .data = qcom_cpufreq_kryo_name_version },
|
|
+ { .compatible = "qcom,msm8996",
|
|
+ .data = qcom_cpufreq_kryo_name_version },
|
|
+ {},
|
|
+};
|
|
+
|
|
+/*
|
|
+ * Since the driver depends on smem and nvmem drivers, which may
|
|
+ * return EPROBE_DEFER, all the real activity is done in the probe,
|
|
+ * which may be defered as well. The init here is only registering
|
|
+ * the driver and the platform device.
|
|
+ */
|
|
+static int __init qcom_cpufreq_init(void)
|
|
+{
|
|
+ struct device_node *np = of_find_node_by_path("/");
|
|
+ const struct of_device_id *match;
|
|
+ int ret;
|
|
+
|
|
+ if (!np)
|
|
+ return -ENODEV;
|
|
+
|
|
+ match = of_match_node(qcom_cpufreq_match_list, np);
|
|
+ of_node_put(np);
|
|
+ if (!match)
|
|
+ return -ENODEV;
|
|
+
|
|
+ ret = platform_driver_register(&qcom_cpufreq_driver);
|
|
+ if (unlikely(ret < 0))
|
|
+ return ret;
|
|
+
|
|
+ cpufreq_pdev = platform_device_register_data(NULL, "qcom-cpufreq-nvmem",
|
|
+ -1, match, sizeof(*match));
|
|
+ ret = PTR_ERR_OR_ZERO(cpufreq_pdev);
|
|
+ if (0 == ret)
|
|
+ return 0;
|
|
+
|
|
+ platform_driver_unregister(&qcom_cpufreq_driver);
|
|
+ return ret;
|
|
+}
|
|
+module_init(qcom_cpufreq_init);
|
|
+
|
|
+static void __exit qcom_cpufreq_exit(void)
|
|
+{
|
|
+ platform_device_unregister(cpufreq_pdev);
|
|
+ platform_driver_unregister(&qcom_cpufreq_driver);
|
|
+}
|
|
+module_exit(qcom_cpufreq_exit);
|
|
+
|
|
+MODULE_DESCRIPTION("Qualcomm Technologies, Inc. CPUfreq driver");
|
|
+MODULE_LICENSE("GPL v2");
|