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60 lines
1.8 KiB
Diff
60 lines
1.8 KiB
Diff
From 5e679bb5e0ba948e5a1aa52ab50b6b60d175348d Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Wed, 21 Mar 2012 14:17:37 +0100
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Subject: [PATCH 67/73] MIPS: lantiq: adds bootsel helper
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---
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.../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 12 ++++++++++++
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arch/mips/lantiq/xway/reset.c | 12 +++++++++++-
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2 files changed, 23 insertions(+), 1 deletions(-)
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--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
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+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
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@@ -144,6 +144,18 @@
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#define LTQ_MPS_BASE_ADDR (KSEG1 + 0x1F107000)
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#define LTQ_MPS_CHIPID ((u32 *)(LTQ_MPS_BASE_ADDR + 0x0344))
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+/* BOOT_SEL - find what boot media we have */
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+#define BS_EXT_ROM 0x0
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+#define BS_FLASH 0x1
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+#define BS_MII0 0x2
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+#define BS_PCI 0x3
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+#define BS_UART1 0x4
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+#define BS_SPI 0x5
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+#define BS_NAND 0x6
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+#define BS_RMII0 0x7
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+
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+extern unsigned char ltq_boot_select(void);
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+
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/* register access macros for EBU and CGU */
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#define ltq_ebu_w32(x, y) ltq_w32((x), ltq_ebu_membase + (y))
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#define ltq_ebu_r32(x) ltq_r32(ltq_ebu_membase + (x))
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--- a/arch/mips/lantiq/xway/reset.c
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+++ b/arch/mips/lantiq/xway/reset.c
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@@ -27,7 +27,11 @@
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#define RCU_RST_STAT 0x0014
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/* reset cause */
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-#define RCU_STAT_SHIFT 26
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+#define RCU_STAT_SHIFT 26
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+/* boot selection */
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+#define RCU_BOOT_SEL_SHIFT 26
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+#define RCU_BOOT_SEL_MASK 0x7
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+
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/* Global SW Reset */
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#define RCU_RD_SRST BIT(30)
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/* Memory Controller */
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@@ -75,6 +79,12 @@ int ltq_reset_cause(void)
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}
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EXPORT_SYMBOL_GPL(ltq_reset_cause);
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+unsigned char ltq_boot_select(void)
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+{
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+ u32 val = ltq_rcu_r32(RCU_RST_STAT);
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+ return (val >> RCU_BOOT_SEL_SHIFT) & RCU_BOOT_SEL_MASK;
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+}
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+
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void ltq_reset_once(unsigned int module, ulong usec)
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{
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ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | module, RCU_RST_REQ);
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