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522 lines
14 KiB
Diff
522 lines
14 KiB
Diff
From bed297dad6283a5926962c1c59f95ad641824630 Mon Sep 17 00:00:00 2001
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From: =?utf-8?q?Arve=20Hj=C3=B8nnev=C3=A5g?= <arve@google.com>
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Date: Fri, 29 Jun 2007 22:20:07 -0700
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Subject: [PATCH 125/134] [ARM] goldfish: NAND: Add nand driver for goldfish.
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MIME-Version: 1.0
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Content-Type: text/plain; charset=utf-8
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Content-Transfer-Encoding: 8bit
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Signed-off-by: Mike A. Chan <mikechan@google.com>
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Signed-off-by: Arve Hjønnevåg <arve@android.com>
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---
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drivers/mtd/devices/Kconfig | 5 +
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drivers/mtd/devices/Makefile | 1 +
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drivers/mtd/devices/goldfish_nand.c | 418 +++++++++++++++++++++++++++++++
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drivers/mtd/devices/goldfish_nand_reg.h | 58 +++++
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4 files changed, 482 insertions(+), 0 deletions(-)
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create mode 100644 drivers/mtd/devices/goldfish_nand.c
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create mode 100644 drivers/mtd/devices/goldfish_nand_reg.h
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--- a/drivers/mtd/devices/Kconfig
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+++ b/drivers/mtd/devices/Kconfig
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@@ -297,5 +297,10 @@ config MTD_DOCPROBE_55AA
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LinuxBIOS or if you need to recover a DiskOnChip Millennium on which
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you have managed to wipe the first block.
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+config MTD_GOLDFISH_NAND
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+ tristate "Goldfish NAND device"
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+ help
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+ none
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+
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endmenu
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--- a/drivers/mtd/devices/Makefile
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+++ b/drivers/mtd/devices/Makefile
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@@ -16,3 +16,4 @@ obj-$(CONFIG_MTD_LART) += lart.o
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obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
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obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
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obj-$(CONFIG_MTD_M25P80) += m25p80.o
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+obj-$(CONFIG_MTD_GOLDFISH_NAND) += goldfish_nand.o
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--- /dev/null
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+++ b/drivers/mtd/devices/goldfish_nand.c
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@@ -0,0 +1,418 @@
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+/* drivers/mtd/devices/goldfish_nand.c
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+**
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+** Copyright (C) 2007 Google, Inc.
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+**
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+** This software is licensed under the terms of the GNU General Public
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+** License version 2, as published by the Free Software Foundation, and
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+** may be copied, distributed, and modified under those terms.
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+**
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+** This program is distributed in the hope that it will be useful,
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+** but WITHOUT ANY WARRANTY; without even the implied warranty of
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+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+** GNU General Public License for more details.
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+**
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+*/
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+
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+#include <asm/div64.h>
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+#include <asm/io.h>
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+#include <linux/module.h>
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+#include <linux/slab.h>
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+#include <linux/ioport.h>
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+#include <linux/vmalloc.h>
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+#include <linux/init.h>
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+#include <linux/mtd/compatmac.h>
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+#include <linux/mtd/mtd.h>
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+#include <linux/platform_device.h>
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+
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+#include "goldfish_nand_reg.h"
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+
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+struct goldfish_nand {
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+ spinlock_t lock;
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+ unsigned char __iomem *base;
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+ size_t mtd_count;
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+ struct mtd_info mtd[0];
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+};
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+
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+static uint32_t goldfish_nand_cmd(struct mtd_info *mtd, enum nand_cmd cmd,
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+ uint64_t addr, uint32_t len, void *ptr)
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+{
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+ struct goldfish_nand *nand = mtd->priv;
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+ uint32_t rv;
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+ unsigned long irq_flags;
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+ unsigned char __iomem *base = nand->base;
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+
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+ spin_lock_irqsave(&nand->lock, irq_flags);
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+ writel(mtd - nand->mtd, base + NAND_DEV);
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+ writel((uint32_t)(addr >> 32), base + NAND_ADDR_HIGH);
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+ writel((uint32_t)addr, base + NAND_ADDR_LOW);
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+ writel(len, base + NAND_TRANSFER_SIZE);
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+ writel(ptr, base + NAND_DATA);
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+ writel(cmd, base + NAND_COMMAND);
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+ rv = readl(base + NAND_RESULT);
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+ spin_unlock_irqrestore(&nand->lock, irq_flags);
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+ return rv;
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+}
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+
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+static int goldfish_nand_erase(struct mtd_info *mtd, struct erase_info *instr)
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+{
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+ loff_t ofs = instr->addr;
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+ uint32_t len = instr->len;
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+ uint32_t rem;
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+
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+ if (ofs + len > mtd->size)
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+ goto invalid_arg;
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+ rem = do_div(ofs, mtd->writesize);
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+ if(rem)
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+ goto invalid_arg;
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+ ofs *= (mtd->writesize + mtd->oobsize);
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+
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+ if(len % mtd->writesize)
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+ goto invalid_arg;
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+ len = len / mtd->writesize * (mtd->writesize + mtd->oobsize);
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+
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+ if(goldfish_nand_cmd(mtd, NAND_CMD_ERASE, ofs, len, NULL) != len) {
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+ printk("goldfish_nand_erase: erase failed, start %llx, len %x, dev_size "
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+ "%llx, erase_size %x\n", ofs, len, mtd->size, mtd->erasesize);
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+ return -EIO;
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+ }
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+
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+ instr->state = MTD_ERASE_DONE;
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+ mtd_erase_callback(instr);
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+
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+ return 0;
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+
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+invalid_arg:
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+ printk("goldfish_nand_erase: invalid erase, start %llx, len %x, dev_size "
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+ "%llx, erase_size %x\n", ofs, len, mtd->size, mtd->erasesize);
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+ return -EINVAL;
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+}
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+
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+static int goldfish_nand_read_oob(struct mtd_info *mtd, loff_t ofs,
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+ struct mtd_oob_ops *ops)
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+{
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+ uint32_t rem;
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+
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+ if(ofs + ops->len > mtd->size)
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+ goto invalid_arg;
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+ if(ops->datbuf && ops->len && ops->len != mtd->writesize)
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+ goto invalid_arg;
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+ if(ops->ooblen + ops->ooboffs > mtd->oobsize)
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+ goto invalid_arg;
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+
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+ rem = do_div(ofs, mtd->writesize);
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+ if(rem)
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+ goto invalid_arg;
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+ ofs *= (mtd->writesize + mtd->oobsize);
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+
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+ if(ops->datbuf)
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+ ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs,
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+ ops->len, ops->datbuf);
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+ ofs += mtd->writesize + ops->ooboffs;
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+ if(ops->oobbuf)
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+ ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs,
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+ ops->ooblen, ops->oobbuf);
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+ return 0;
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+
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+invalid_arg:
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+ printk("goldfish_nand_read_oob: invalid read, start %llx, len %x, "
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+ "ooblen %x, dev_size %llx, write_size %x\n",
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+ ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize);
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+ return -EINVAL;
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+}
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+
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+static int goldfish_nand_write_oob(struct mtd_info *mtd, loff_t ofs,
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+ struct mtd_oob_ops *ops)
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+{
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+ uint32_t rem;
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+
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+ if(ofs + ops->len > mtd->size)
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+ goto invalid_arg;
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+ if(ops->len && ops->len != mtd->writesize)
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+ goto invalid_arg;
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+ if(ops->ooblen + ops->ooboffs > mtd->oobsize)
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+ goto invalid_arg;
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+
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+ rem = do_div(ofs, mtd->writesize);
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+ if(rem)
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+ goto invalid_arg;
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+ ofs *= (mtd->writesize + mtd->oobsize);
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+
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+ if(ops->datbuf)
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+ ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs,
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+ ops->len, ops->datbuf);
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+ ofs += mtd->writesize + ops->ooboffs;
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+ if(ops->oobbuf)
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+ ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs,
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+ ops->ooblen, ops->oobbuf);
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+ return 0;
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+
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+invalid_arg:
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+ printk("goldfish_nand_write_oob: invalid write, start %llx, len %x, "
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+ "ooblen %x, dev_size %llx, write_size %x\n",
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+ ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize);
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+ return -EINVAL;
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+}
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+
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+static int goldfish_nand_read(struct mtd_info *mtd, loff_t from, size_t len,
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+ size_t *retlen, u_char *buf)
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+{
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+ uint32_t rem;
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+
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+ if(from + len > mtd->size)
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+ goto invalid_arg;
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+ if(len != mtd->writesize)
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+ goto invalid_arg;
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+
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+ rem = do_div(from, mtd->writesize);
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+ if(rem)
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+ goto invalid_arg;
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+ from *= (mtd->writesize + mtd->oobsize);
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+
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+ *retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, from, len, buf);
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+ return 0;
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+
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+invalid_arg:
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+ printk("goldfish_nand_read: invalid read, start %llx, len %x, dev_size %llx"
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+ ", write_size %x\n", from, len, mtd->size, mtd->writesize);
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+ return -EINVAL;
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+}
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+
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+static int goldfish_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
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+ size_t *retlen, const u_char *buf)
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+{
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+ uint32_t rem;
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+
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+ if(to + len > mtd->size)
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+ goto invalid_arg;
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+ if(len != mtd->writesize)
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+ goto invalid_arg;
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+
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+ rem = do_div(to, mtd->writesize);
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+ if(rem)
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+ goto invalid_arg;
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+ to *= (mtd->writesize + mtd->oobsize);
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+
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+ *retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, to, len, (void *)buf);
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+ return 0;
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+
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+invalid_arg:
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+ printk("goldfish_nand_write: invalid write, start %llx, len %x, dev_size %llx"
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+ ", write_size %x\n", to, len, mtd->size, mtd->writesize);
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+ return -EINVAL;
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+}
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+
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+static int goldfish_nand_block_isbad(struct mtd_info *mtd, loff_t ofs)
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+{
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+ uint32_t rem;
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+
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+ if(ofs >= mtd->size)
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+ goto invalid_arg;
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+
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+ rem = do_div(ofs, mtd->erasesize);
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+ if(rem)
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+ goto invalid_arg;
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+ ofs *= mtd->erasesize / mtd->writesize;
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+ ofs *= (mtd->writesize + mtd->oobsize);
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+
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+ return goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_GET, ofs, 0, NULL);
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+
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+invalid_arg:
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+ printk("goldfish_nand_block_isbad: invalid arg, ofs %llx, dev_size %llx, "
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+ "write_size %x\n", ofs, mtd->size, mtd->writesize);
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+ return -EINVAL;
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+}
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+
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+static int goldfish_nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
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+{
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+ uint32_t rem;
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+
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+ if(ofs >= mtd->size)
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+ goto invalid_arg;
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+
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+ rem = do_div(ofs, mtd->erasesize);
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+ if(rem)
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+ goto invalid_arg;
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+ ofs *= mtd->erasesize / mtd->writesize;
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+ ofs *= (mtd->writesize + mtd->oobsize);
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+
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+ if(goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_SET, ofs, 0, NULL) != 1)
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+ return -EIO;
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+ return 0;
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+
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+invalid_arg:
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+ printk("goldfish_nand_block_markbad: invalid arg, ofs %llx, dev_size %llx, "
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+ "write_size %x\n", ofs, mtd->size, mtd->writesize);
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+ return -EINVAL;
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+}
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+
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+static int goldfish_nand_init_device(struct goldfish_nand *nand, int id)
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+{
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+ uint32_t name_len;
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+ uint32_t result;
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+ uint32_t flags;
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+ unsigned long irq_flags;
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+ unsigned char __iomem *base = nand->base;
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+ struct mtd_info *mtd = &nand->mtd[id];
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+ char *name;
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+
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+ spin_lock_irqsave(&nand->lock, irq_flags);
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+ writel(id, base + NAND_DEV);
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+ flags = readl(base + NAND_DEV_FLAGS);
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+ name_len = readl(base + NAND_DEV_NAME_LEN);
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+ mtd->writesize = readl(base + NAND_DEV_PAGE_SIZE);
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+ mtd->size = readl(base + NAND_DEV_SIZE_LOW);
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+ mtd->size |= (uint64_t)readl(base + NAND_DEV_SIZE_HIGH) << 32;
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+ mtd->oobsize = readl(base + NAND_DEV_EXTRA_SIZE);
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+ mtd->oobavail = mtd->oobsize;
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+ mtd->erasesize = readl(base + NAND_DEV_ERASE_SIZE) /
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+ (mtd->writesize + mtd->oobsize) * mtd->writesize;
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+ do_div(mtd->size, mtd->writesize + mtd->oobsize);
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+ mtd->size *= mtd->writesize;
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+ printk("goldfish nand dev%d: size %llx, page %d, extra %d, erase %d\n",
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+ id, mtd->size, mtd->writesize, mtd->oobsize, mtd->erasesize);
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+ spin_unlock_irqrestore(&nand->lock, irq_flags);
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+
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+ mtd->priv = nand;
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+
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+ mtd->name = name = kmalloc(name_len + 1, GFP_KERNEL);
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+ if(name == NULL)
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+ return -ENOMEM;
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+
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+ result = goldfish_nand_cmd(mtd, NAND_CMD_GET_DEV_NAME, 0, name_len, name);
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+ if(result != name_len) {
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+ kfree(mtd->name);
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+ mtd->name = NULL;
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+ printk("goldfish_nand_init_device failed to get dev name %d != %d\n",
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+ result, name_len);
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+ return -ENODEV;
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+ }
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+ ((char *) mtd->name)[name_len] = '\0';
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+
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+ /* Setup the MTD structure */
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+ mtd->type = MTD_NANDFLASH;
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+ mtd->flags = MTD_CAP_NANDFLASH;
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+ if(flags & NAND_DEV_FLAG_READ_ONLY)
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+ mtd->flags &= ~MTD_WRITEABLE;
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+
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+ mtd->owner = THIS_MODULE;
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+ mtd->erase = goldfish_nand_erase;
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+ mtd->read = goldfish_nand_read;
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+ mtd->write = goldfish_nand_write;
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+ mtd->read_oob = goldfish_nand_read_oob;
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+ mtd->write_oob = goldfish_nand_write_oob;
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+ mtd->block_isbad = goldfish_nand_block_isbad;
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+ mtd->block_markbad = goldfish_nand_block_markbad;
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+
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+ if (add_mtd_device(mtd)) {
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+ kfree(mtd->name);
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+ mtd->name = NULL;
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+ return -EIO;
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+ }
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+
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+ return 0;
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+}
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+
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+static int goldfish_nand_probe(struct platform_device *pdev)
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+{
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+ uint32_t num_dev;
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+ int i;
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+ int err;
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+ uint32_t num_dev_working;
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+ uint32_t version;
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+ struct resource *r;
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+ struct goldfish_nand *nand;
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+ unsigned char __iomem *base;
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+
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+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ if(r == NULL) {
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+ err = -ENODEV;
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+ goto err_no_io_base;
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+ }
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+
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+ base = ioremap(r->start, PAGE_SIZE);
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+ if(base == NULL) {
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+ err = -ENOMEM;
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+ goto err_ioremap;
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+ }
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+ version = readl(base + NAND_VERSION);
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+ if(version != NAND_VERSION_CURRENT) {
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+ printk("goldfish_nand_init: version mismatch, got %d, expected %d\n",
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+ version, NAND_VERSION_CURRENT);
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+ err = -ENODEV;
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+ goto err_no_dev;
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+ }
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+ num_dev = readl(base + NAND_NUM_DEV);
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+ if(num_dev == 0) {
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+ err = -ENODEV;
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+ goto err_no_dev;
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+ }
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+
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+ nand = kzalloc(sizeof(*nand) + sizeof(struct mtd_info) * num_dev, GFP_KERNEL);
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+ if(nand == NULL) {
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+ err = -ENOMEM;
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+ goto err_nand_alloc_failed;
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+ }
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+ spin_lock_init(&nand->lock);
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+ nand->base = base;
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+ nand->mtd_count = num_dev;
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+ platform_set_drvdata(pdev, nand);
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+
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+ num_dev_working = 0;
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+ for(i = 0; i < num_dev; i++) {
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+ err = goldfish_nand_init_device(nand, i);
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+ if(err == 0)
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+ num_dev_working++;
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+ }
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+ if(num_dev_working == 0) {
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+ err = -ENODEV;
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+ goto err_no_working_dev;
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+ }
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+ return 0;
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+
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+err_no_working_dev:
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+ kfree(nand);
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+err_nand_alloc_failed:
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+err_no_dev:
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+ iounmap(base);
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+err_ioremap:
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+err_no_io_base:
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+ return err;
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+}
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+
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+static int goldfish_nand_remove(struct platform_device *pdev)
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+{
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+ struct goldfish_nand *nand = platform_get_drvdata(pdev);
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+ int i;
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+ for(i = 0; i < nand->mtd_count; i++) {
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+ if(nand->mtd[i].name) {
|
|
+ del_mtd_device(&nand->mtd[i]);
|
|
+ kfree(nand->mtd[i].name);
|
|
+ }
|
|
+ }
|
|
+ iounmap(nand->base);
|
|
+ kfree(nand);
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static struct platform_driver goldfish_nand_driver = {
|
|
+ .probe = goldfish_nand_probe,
|
|
+ .remove = goldfish_nand_remove,
|
|
+ .driver = {
|
|
+ .name = "goldfish_nand"
|
|
+ }
|
|
+};
|
|
+
|
|
+static int __init goldfish_nand_init(void)
|
|
+{
|
|
+ return platform_driver_register(&goldfish_nand_driver);
|
|
+}
|
|
+
|
|
+static void __exit goldfish_nand_exit(void)
|
|
+{
|
|
+ platform_driver_unregister(&goldfish_nand_driver);
|
|
+}
|
|
+
|
|
+
|
|
+module_init(goldfish_nand_init);
|
|
+module_exit(goldfish_nand_exit);
|
|
+
|
|
--- /dev/null
|
|
+++ b/drivers/mtd/devices/goldfish_nand_reg.h
|
|
@@ -0,0 +1,58 @@
|
|
+/* drivers/mtd/devices/goldfish_nand_reg.h
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#ifndef GOLDFISH_NAND_REG_H
|
|
+#define GOLDFISH_NAND_REG_H
|
|
+
|
|
+enum nand_cmd {
|
|
+ NAND_CMD_GET_DEV_NAME, // Write device name for NAND_DEV to NAND_DATA (vaddr)
|
|
+ NAND_CMD_READ,
|
|
+ NAND_CMD_WRITE,
|
|
+ NAND_CMD_ERASE,
|
|
+ NAND_CMD_BLOCK_BAD_GET, // NAND_RESULT is 1 if block is bad, 0 if it is not
|
|
+ NAND_CMD_BLOCK_BAD_SET
|
|
+};
|
|
+
|
|
+enum nand_dev_flags {
|
|
+ NAND_DEV_FLAG_READ_ONLY = 0x00000001
|
|
+};
|
|
+
|
|
+#define NAND_VERSION_CURRENT (1)
|
|
+
|
|
+enum nand_reg {
|
|
+ // Global
|
|
+ NAND_VERSION = 0x000,
|
|
+ NAND_NUM_DEV = 0x004,
|
|
+ NAND_DEV = 0x008,
|
|
+
|
|
+ // Dev info
|
|
+ NAND_DEV_FLAGS = 0x010,
|
|
+ NAND_DEV_NAME_LEN = 0x014,
|
|
+ NAND_DEV_PAGE_SIZE = 0x018,
|
|
+ NAND_DEV_EXTRA_SIZE = 0x01c,
|
|
+ NAND_DEV_ERASE_SIZE = 0x020,
|
|
+ NAND_DEV_SIZE_LOW = 0x028,
|
|
+ NAND_DEV_SIZE_HIGH = 0x02c,
|
|
+
|
|
+ // Command
|
|
+ NAND_RESULT = 0x040,
|
|
+ NAND_COMMAND = 0x044,
|
|
+ NAND_DATA = 0x048,
|
|
+ NAND_TRANSFER_SIZE = 0x04c,
|
|
+ NAND_ADDR_LOW = 0x050,
|
|
+ NAND_ADDR_HIGH = 0x054,
|
|
+};
|
|
+
|
|
+#endif
|