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122 lines
3.8 KiB
Diff
122 lines
3.8 KiB
Diff
From 660c13dfbacbf37f090a66a2b14f0c5ce7cbec81 Mon Sep 17 00:00:00 2001
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From: John Crispin <john@phrozen.org>
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Date: Thu, 10 Aug 2017 16:38:27 +0200
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Subject: [PATCH 57/57] net: mediatek: add HW QoS support
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Signed-off-by: John Crispin <john@phrozen.org>
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---
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drivers/net/ethernet/mediatek/Kconfig | 7 ++++
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drivers/net/ethernet/mediatek/mtk_eth_soc.c | 60 ++++++++++++++++++++++++++++-
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drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 +-
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3 files changed, 66 insertions(+), 3 deletions(-)
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--- a/drivers/net/ethernet/mediatek/Kconfig
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+++ b/drivers/net/ethernet/mediatek/Kconfig
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@@ -21,4 +21,11 @@ config NET_MEDIATEK_HNAT
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This driver supports the hardwaer NAT in the
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MediaTek MT2701/MT7623 chipset family.
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+config NET_MEDIATEK_HW_QOS
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+ tristate "MediaTek MT7623 hardware QoS support"
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+ depends on NET_MEDIATEK_SOC
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+ ---help---
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+ This driver supports the hardware QoS in the
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+ MediaTek MT2701/MT7623 chipset family.
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+
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endif #NET_VENDOR_MEDIATEK
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -23,6 +23,17 @@
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#include <linux/reset.h>
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#include <linux/tcp.h>
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+#if defined(CONFIG_NET_MEDIATEK_HW_QOS)
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+struct mtk_ioctl_reg {
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+ unsigned int off;
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+ unsigned int val;
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+};
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+
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+#define REG_HQOS_MAX 0x3FFF
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+#define RAETH_QDMA_REG_READ 0x89F8
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+#define RAETH_QDMA_REG_WRITE 0x89F9
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+#endif
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+
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#if defined(CONFIG_NET_MEDIATEK_HNAT) || defined(CONFIG_NET_MEDIATEK_HNAT_MODULE)
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#include "mtk_hnat/nf_hnat_mtk.h"
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#endif
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@@ -646,7 +657,7 @@ static int mtk_tx_map(struct sk_buff *sk
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dma_addr_t mapped_addr;
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unsigned int nr_frags;
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int i, n_desc = 1;
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- u32 txd4 = 0, fport;
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+ u32 txd3 = 0, txd4 = 0, fport;
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itxd = ring->next_free;
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if (itxd == ring->last_free)
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@@ -675,6 +686,12 @@ static int mtk_tx_map(struct sk_buff *sk
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// if (skb_vlan_tag_present(skb))
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// txd4 |= TX_DMA_INS_VLAN | skb_vlan_tag_get(skb);
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+#ifdef CONFIG_NET_MEDIATEK_HW_QOS
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+ txd3 |= skb->mark & 0x7;
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+ if (mac->id)
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+ txd3 += 8;
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+#endif
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+
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mapped_addr = dma_map_single(eth->dev, skb->data,
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skb_headlen(skb), DMA_TO_DEVICE);
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if (unlikely(dma_mapping_error(eth->dev, mapped_addr)))
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@@ -718,7 +735,8 @@ static int mtk_tx_map(struct sk_buff *sk
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WRITE_ONCE(txd->txd1, mapped_addr);
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WRITE_ONCE(txd->txd3, (TX_DMA_SWC |
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TX_DMA_PLEN0(frag_map_size) |
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- last_frag * TX_DMA_LS0));
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+ last_frag * TX_DMA_LS0 |
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+ txd3));
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WRITE_ONCE(txd->txd4, fport);
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tx_buf = mtk_desc_to_tx_buf(ring, txd);
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@@ -2029,7 +2047,31 @@ static void mtk_uninit(struct net_device
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static int mtk_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
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{
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+#if defined(CONFIG_NET_MEDIATEK_HW_QOS)
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+ struct mtk_mac *mac = netdev_priv(dev);
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+ struct mtk_eth *eth = mac->hw;
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+ struct mtk_ioctl_reg reg;
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+#endif
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+
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switch (cmd) {
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+#if defined(CONFIG_NET_MEDIATEK_HW_QOS)
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+ case RAETH_QDMA_REG_READ:
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+ copy_from_user(®, ifr->ifr_data, sizeof(reg));
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+ if (reg.off > REG_HQOS_MAX)
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+ return -EINVAL;
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+ reg.val = mtk_r32(eth, 0x1800 + reg.off);
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+// printk("read reg off:%x val:%x\n", reg.off, reg.val);
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+ copy_to_user(ifr->ifr_data, ®, sizeof(reg));
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+ return 0;
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+
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+ case RAETH_QDMA_REG_WRITE:
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+ copy_from_user(®, ifr->ifr_data, sizeof(reg));
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+ if (reg.off > REG_HQOS_MAX)
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+ return -EINVAL;
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+ mtk_w32(eth, reg.val, 0x1800 + reg.off);
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+// printk("write reg off:%x val:%x\n", reg.off, reg.val);
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+ return 0;
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+#endif
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case SIOCGMIIPHY:
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case SIOCGMIIREG:
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case SIOCSMIIREG:
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -20,7 +20,7 @@
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#define MTK_QDMA_PAGE_SIZE 2048
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#define MTK_MAX_RX_LENGTH 1536
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#define MTK_TX_DMA_BUF_LEN 0x3fff
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-#define MTK_DMA_SIZE 256
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+#define MTK_DMA_SIZE 2048
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#define MTK_NAPI_WEIGHT 64
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#define MTK_MAC_COUNT 2
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#define MTK_RX_ETH_HLEN (VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)
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