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136 lines
3.9 KiB
C
136 lines
3.9 KiB
C
/*
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* Atheros AR71xx built-in ethernet mac driver
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/sizes.h>
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#include <linux/of_address.h>
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#include "ag71xx.h"
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static void ag71xx_of_set(struct device_node *np, const char *prop,
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u32 *reg, u32 shift, u32 mask)
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{
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u32 val;
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if (of_property_read_u32(np, prop, &val))
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return;
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*reg &= ~(mask << shift);
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*reg |= ((val & mask) << shift);
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}
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static void ag71xx_of_bit(struct device_node *np, const char *prop,
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u32 *reg, u32 mask)
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{
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u32 val;
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if (of_property_read_u32(np, prop, &val))
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return;
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if (val)
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*reg |= mask;
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else
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*reg &= ~mask;
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}
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static void ag71xx_setup_gmac_933x(struct device_node *np, void __iomem *base)
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{
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u32 val = __raw_readl(base + AR933X_GMAC_REG_ETH_CFG);
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ag71xx_of_bit(np, "switch-phy-swap", &val, AR933X_ETH_CFG_SW_PHY_SWAP);
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ag71xx_of_bit(np, "switch-phy-addr-swap", &val,
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AR933X_ETH_CFG_SW_PHY_ADDR_SWAP);
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__raw_writel(val, base + AR933X_GMAC_REG_ETH_CFG);
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}
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static void ag71xx_setup_gmac_934x(struct device_node *np, void __iomem *base)
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{
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u32 val = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
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ag71xx_of_bit(np, "rgmii-gmac0", &val, AR934X_ETH_CFG_RGMII_GMAC0);
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ag71xx_of_bit(np, "mii-gmac0", &val, AR934X_ETH_CFG_MII_GMAC0);
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ag71xx_of_bit(np, "mii-gmac0-slave", &val, AR934X_ETH_CFG_MII_GMAC0_SLAVE);
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ag71xx_of_bit(np, "gmii-gmac0", &val, AR934X_ETH_CFG_GMII_GMAC0);
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ag71xx_of_bit(np, "switch-phy-swap", &val, AR934X_ETH_CFG_SW_PHY_SWAP);
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ag71xx_of_bit(np, "switch-only-mode", &val,
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AR934X_ETH_CFG_SW_ONLY_MODE);
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ag71xx_of_set(np, "rxdv-delay", &val,
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AR934X_ETH_CFG_RDV_DELAY_SHIFT, 0x3);
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ag71xx_of_set(np, "rxd-delay", &val,
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AR934X_ETH_CFG_RXD_DELAY_SHIFT, 0x3);
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ag71xx_of_set(np, "txd-delay", &val,
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AR934X_ETH_CFG_TXD_DELAY_SHIFT, 0x3);
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ag71xx_of_set(np, "txen-delay", &val,
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AR934X_ETH_CFG_TXE_DELAY_SHIFT, 0x3);
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__raw_writel(val, base + AR934X_GMAC_REG_ETH_CFG);
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}
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static void ag71xx_setup_gmac_955x(struct device_node *np, void __iomem *base)
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{
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u32 val = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG);
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ag71xx_of_bit(np, "rgmii-enabled", &val, QCA955X_ETH_CFG_RGMII_EN);
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ag71xx_of_bit(np, "ge0-sgmii", &val, QCA955X_ETH_CFG_GE0_SGMII);
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ag71xx_of_set(np, "txen-delay", &val, QCA955X_ETH_CFG_TXE_DELAY_SHIFT, 0x3);
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ag71xx_of_set(np, "txd-delay", &val, QCA955X_ETH_CFG_TXD_DELAY_SHIFT, 0x3);
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ag71xx_of_set(np, "rxdv-delay", &val, QCA955X_ETH_CFG_RDV_DELAY_SHIFT, 0x3);
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ag71xx_of_set(np, "rxd-delay", &val, QCA955X_ETH_CFG_RXD_DELAY_SHIFT, 0x3);
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__raw_writel(val, base + QCA955X_GMAC_REG_ETH_CFG);
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}
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static void ag71xx_setup_gmac_956x(struct device_node *np, void __iomem *base)
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{
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u32 val = __raw_readl(base + QCA956X_GMAC_REG_ETH_CFG);
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ag71xx_of_bit(np, "switch-phy-swap", &val, QCA956X_ETH_CFG_SW_PHY_SWAP);
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ag71xx_of_bit(np, "switch-phy-addr-swap", &val,
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QCA956X_ETH_CFG_SW_PHY_ADDR_SWAP);
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__raw_writel(val, base + QCA956X_GMAC_REG_ETH_CFG);
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}
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int ag71xx_setup_gmac(struct device_node *np)
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{
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struct device_node *np_dev;
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void __iomem *base;
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int err = 0;
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np = of_get_child_by_name(np, "gmac-config");
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if (!np)
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return 0;
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np_dev = of_parse_phandle(np, "device", 0);
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if (!np_dev)
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goto out;
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base = of_iomap(np_dev, 0);
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if (!base) {
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pr_err("%pOF: can't map GMAC registers\n", np_dev);
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err = -ENOMEM;
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goto err_iomap;
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}
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if (of_device_is_compatible(np_dev, "qca,ar9330-gmac"))
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ag71xx_setup_gmac_933x(np, base);
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else if (of_device_is_compatible(np_dev, "qca,ar9340-gmac"))
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ag71xx_setup_gmac_934x(np, base);
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else if (of_device_is_compatible(np_dev, "qca,qca9550-gmac"))
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ag71xx_setup_gmac_955x(np, base);
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else if (of_device_is_compatible(np_dev, "qca,qca9560-gmac"))
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ag71xx_setup_gmac_956x(np, base);
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iounmap(base);
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err_iomap:
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of_node_put(np_dev);
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out:
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of_node_put(np);
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return err;
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}
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