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62 lines
1.8 KiB
Diff
62 lines
1.8 KiB
Diff
From 9112596c3c7b7b8b1eded3323765fa711dc58e74 Mon Sep 17 00:00:00 2001
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From: Tang Yuantian <Yuantian.Tang@nxp.com>
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Date: Thu, 25 Aug 2016 10:38:28 +0800
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Subject: [PATCH 073/113] ls1012a: added clock configuration
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commit c9c11181191938b77bfd61e5094a63955cf711fd
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[context adjustment]
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[don't apply fsl-ls1012a.dtsi]
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Currently ls1012a used the clock configuration of ls1043a's.
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But there is a little different between them. This patch added
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ls1012a its own clock configuration.
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Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
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Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
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---
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drivers/clk/clk-qoriq.c | 19 +++++++++++++++++++
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1 file changed, 19 insertions(+)
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--- a/drivers/clk/clk-qoriq.c
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+++ b/drivers/clk/clk-qoriq.c
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@@ -195,6 +195,14 @@ static const struct clockgen_muxinfo t10
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}
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};
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+static const struct clockgen_muxinfo ls1012a_cmux = {
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+ {
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+ [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
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+ {},
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+ [2] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
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+ }
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+};
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+
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static const struct clockgen_muxinfo t1040_cmux = {
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{
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[0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
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@@ -475,6 +483,16 @@ static const struct clockgen_chipinfo ch
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.pll_mask = 0x03,
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},
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{
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+ .compat = "fsl,ls1012a-clockgen",
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+ .cmux_groups = {
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+ &ls1012a_cmux
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+ },
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+ .cmux_to_group = {
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+ 0, -1
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+ },
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+ .pll_mask = 0x03,
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+ },
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+ {
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.compat = "fsl,ls1043a-clockgen",
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.init_periph = t2080_init_periph,
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.cmux_groups = {
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@@ -1272,6 +1290,7 @@ CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qo
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CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
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CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
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CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
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+CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", clockgen_init);
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/* Legacy nodes */
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CLK_OF_DECLARE(qoriq_sysclk_1, "fsl,qoriq-sysclk-1.0", sysclk_init);
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