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Tomasz Maciej Nowak 2d61f8821c mvebu: cortexa9: correct cpu subtype ... Armada 370 processors have only 16 double-precision registers. The change introduced by 8dcc108760 ("toolchain: ARM: Fix toolchain compilation for gcc 8.x") switched accidentally the toolchain for mvebu cortexa9 subtarget to cpu type with 32 double-precision registers. This stems from gcc defaults which assume "vfpv3-d32" if only "vfpv3" as mfpu is specified. That change resulted in unusable image, in which kernel will kill userspace as soon as it causing "Illegal instruction". Ref: https://forum.openwrt.org/t/gcc-was-broken-on-mvebu-armada-370-device-after-commit-on-2019-03-25/43272 Fixes: 8dcc108760 ("toolchain: ARM: Fix toolchain compilation for gcc 8.x") Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>		4 years ago
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base-files	mvebu: use generic diag.sh	4 years ago
cortexa9	mvebu: cortexa9: correct cpu subtype	4 years ago
cortexa53	mvebu: Remove kernel 4.14 support	4 years ago
cortexa72	mvebu: Remove kernel 4.14 support	4 years ago
files-4.19/arch	mvebu: add initial support for uDPU board	5 years ago
image	treewide: gather DEVICE_VARS into one place	4 years ago
patches-4.19	mvebu: use generic diag.sh	4 years ago
Makefile	treewide: remove maintainer variable from targets	4 years ago
config-4.19	treewide: kernel config: remove runtime options	5 years ago