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582 lines
16 KiB
Diff
582 lines
16 KiB
Diff
From a4ea446a07d7ba010c3c32286a22dc89cffa1e54 Mon Sep 17 00:00:00 2001
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From: Martin Sperl <kernel@martin.sperl.org>
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Date: Sun, 12 May 2019 16:17:08 +0000
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Subject: [PATCH] spi: devicetree: add overlays for spi 3 to 6
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Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
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---
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arch/arm/boot/dts/overlays/Makefile | 8 ++
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arch/arm/boot/dts/overlays/README | 104 ++++++++++++++++++
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.../boot/dts/overlays/spi3-1cs-overlay.dts | 44 ++++++++
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.../boot/dts/overlays/spi3-2cs-overlay.dts | 56 ++++++++++
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.../boot/dts/overlays/spi4-1cs-overlay.dts | 44 ++++++++
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.../boot/dts/overlays/spi4-2cs-overlay.dts | 56 ++++++++++
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.../boot/dts/overlays/spi5-1cs-overlay.dts | 44 ++++++++
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.../boot/dts/overlays/spi5-2cs-overlay.dts | 56 ++++++++++
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.../boot/dts/overlays/spi6-1cs-overlay.dts | 44 ++++++++
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.../boot/dts/overlays/spi6-2cs-overlay.dts | 56 ++++++++++
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10 files changed, 512 insertions(+)
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create mode 100644 arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
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--- a/arch/arm/boot/dts/overlays/Makefile
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+++ b/arch/arm/boot/dts/overlays/Makefile
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@@ -144,6 +144,14 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
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spi2-1cs.dtbo \
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spi2-2cs.dtbo \
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spi2-3cs.dtbo \
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+ spi3-1cs.dtbo \
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+ spi3-2cs.dtbo \
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+ spi4-1cs.dtbo \
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+ spi4-2cs.dtbo \
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+ spi5-1cs.dtbo \
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+ spi5-2cs.dtbo \
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+ spi6-1cs.dtbo \
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+ spi6-2cs.dtbo \
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ssd1306.dtbo \
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superaudioboard.dtbo \
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sx150x.dtbo \
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--- a/arch/arm/boot/dts/overlays/README
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+++ b/arch/arm/boot/dts/overlays/README
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@@ -2085,6 +2085,110 @@ Params: cs0_pin GPIO pin
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is 'okay' or enabled).
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+Name: spi3-1cs
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+Info: Enables spi3 with a single chip select (CS) line and associated spidev
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+ dev node. The gpio pin number for the CS line and spidev device node
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+ creation are configurable.
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+Load: dtoverlay=spi3-1cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
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+ cs0_spidev Set to 'off' to prevent the creation of a
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+ userspace device node /dev/spidev3.0 (default
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+ is 'on' or enabled).
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+
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+
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+Name: spi3-2cs
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+Info: Enables spi3 with two chip select (CS) lines and associated spidev
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+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
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+ creation are configurable.
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+Load: dtoverlay=spi3-2cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
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+ cs1_pin GPIO pin for CS1 (default 24 - BCM SPI3_CE1).
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+ cs0_spidev Set to 'off' to prevent the creation of a
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+ userspace device node /dev/spidev3.0 (default
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+ is 'on' or enabled).
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+ cs1_spidev Set to 'off' to prevent the creation of a
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+ userspace device node /dev/spidev3.1 (default
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+ is 'on' or enabled).
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+
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+
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+Name: spi4-1cs
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+Info: Enables spi4 with a single chip select (CS) line and associated spidev
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+ dev node. The gpio pin number for the CS line and spidev device node
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+ creation are configurable.
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+Load: dtoverlay=spi4-1cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
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+ cs0_spidev Set to 'off' to prevent the creation of a
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+ userspace device node /dev/spidev4.0 (default
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+ is 'on' or enabled).
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+
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+
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+Name: spi4-2cs
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+Info: Enables spi4 with two chip select (CS) lines and associated spidev
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+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
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+ creation are configurable.
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+Load: dtoverlay=spi4-2cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
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+ cs1_pin GPIO pin for CS1 (default 25 - BCM SPI4_CE1).
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+ cs0_spidev Set to 'off' to prevent the creation of a
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+ userspace device node /dev/spidev4.0 (default
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+ is 'on' or enabled).
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+ cs1_spidev Set to 'off' to prevent the creation of a
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+ userspace device node /dev/spidev4.1 (default
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+ is 'on' or enabled).
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+
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+
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+Name: spi5-1cs
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+Info: Enables spi5 with a single chip select (CS) line and associated spidev
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+ dev node. The gpio pin numbers for the CS lines and spidev device node
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+ creation are configurable.
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+Load: dtoverlay=spi5-1cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
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+ cs0_spidev Set to 'off' to prevent the creation of a
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+ userspace device node /dev/spidev5.0 (default
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+ is 'on' or enabled).
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+
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+
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+Name: spi5-2cs
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+Info: Enables spi5 with two chip select (CS) lines and associated spidev
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+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
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+ creation are configurable.
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+Load: dtoverlay=spi5-2cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
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+ cs1_pin GPIO pin for CS1 (default 26 - BCM SPI5_CE1).
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+ cs0_spidev Set to 'off' to prevent the creation of a
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+ userspace device node /dev/spidev5.0 (default
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+ is 'on' or enabled).
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+ cs1_spidev Set to 'off' to prevent the creation of a
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+ userspace device node /dev/spidev5.1 (default
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+ is 'on' or enabled).
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+
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+
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+Name: spi6-1cs
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+Info: Enables spi6 with a single chip select (CS) line and associated spidev
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+ dev node. The gpio pin number for the CS line and spidev device node
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+ creation are configurable.
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+Load: dtoverlay=spi6-1cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
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+ cs0_spidev Set to 'off' to prevent the creation of a
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+ userspace device node /dev/spidev6.0 (default
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+ is 'on' or enabled).
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+
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+
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+Name: spi6-2cs
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+Info: Enables spi6 with two chip select (CS) lines and associated spidev
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+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
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+ creation are configurable.
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+Load: dtoverlay=spi6-2cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
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+ cs1_pin GPIO pin for CS1 (default 27 - BCM SPI6_CE1).
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+ cs0_spidev Set to 'off' to prevent the creation of a
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+ userspace device node /dev/spidev6.0 (default
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+ is 'on' or enabled).
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+ cs1_spidev Set to 'off' to prevent the creation of a
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+ userspace device node /dev/spidev6.1 (default
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+ is 'on' or enabled).
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+
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+
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Name: ssd1306
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Info: Overlay for activation of SSD1306 over I2C OLED display framebuffer.
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Load: dtoverlay=ssd1306,<param>=<val>
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
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@@ -0,0 +1,44 @@
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+/dts-v1/;
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+/plugin/;
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+
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+
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+/ {
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+ compatible = "brcm,bcm2838";
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+
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+ fragment@0 {
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+ target = <&spi3_cs_pins>;
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+ frag0: __overlay__ {
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+ brcm,pins = <0>;
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+ brcm,function = <1>; /* output */
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&spi3>;
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+ frag1: __overlay__ {
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+ /* needed to avoid dtc warning */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
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+ cs-gpios = <&gpio 0 1>;
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+ status = "okay";
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+
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+ spidev3_0: spidev@0 {
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+ compatible = "spidev";
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+ reg = <0>; /* CE0 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <125000000>;
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+ status = "okay";
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+ };
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+ };
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+ };
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+
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+ __overrides__ {
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+ cs0_pin = <&frag0>,"brcm,pins:0",
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+ <&frag1>,"cs-gpios:4";
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+ cs0_spidev = <&spidev3_0>,"status";
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
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@@ -0,0 +1,56 @@
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+/dts-v1/;
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+/plugin/;
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+
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+
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+/ {
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+ compatible = "brcm,bcm2838";
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+
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+ fragment@0 {
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+ target = <&spi3_cs_pins>;
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+ frag0: __overlay__ {
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+ brcm,pins = <0 24>;
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+ brcm,function = <1>; /* output */
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&spi3>;
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+ frag1: __overlay__ {
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+ /* needed to avoid dtc warning */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
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+ cs-gpios = <&gpio 0 1>, <&gpio 24 1>;
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+ status = "okay";
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+
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+ spidev3_0: spidev@0 {
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+ compatible = "spidev";
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+ reg = <0>; /* CE0 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <125000000>;
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+ status = "okay";
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+ };
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+
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+ spidev3_1: spidev@1 {
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+ compatible = "spidev";
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+ reg = <1>; /* CE1 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <125000000>;
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+ status = "okay";
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+ };
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+ };
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+ };
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+
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+ __overrides__ {
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+ cs0_pin = <&frag0>,"brcm,pins:0",
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+ <&frag1>,"cs-gpios:4";
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+ cs1_pin = <&frag0>,"brcm,pins:4",
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+ <&frag1>,"cs-gpios:16";
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+ cs0_spidev = <&spidev3_0>,"status";
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+ cs1_spidev = <&spidev3_1>,"status";
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
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@@ -0,0 +1,44 @@
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+/dts-v1/;
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+/plugin/;
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+
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+
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+/ {
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+ compatible = "brcm,bcm2838";
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+
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+ fragment@0 {
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+ target = <&spi4_cs_pins>;
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+ frag0: __overlay__ {
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+ brcm,pins = <4>;
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+ brcm,function = <1>; /* output */
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&spi4>;
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+ frag1: __overlay__ {
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+ /* needed to avoid dtc warning */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
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+ cs-gpios = <&gpio 4 1>;
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+ status = "okay";
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+
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+ spidev4_0: spidev@0 {
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+ compatible = "spidev";
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+ reg = <0>; /* CE0 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <125000000>;
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+ status = "okay";
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+ };
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+ };
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+ };
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+
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+ __overrides__ {
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+ cs0_pin = <&frag0>,"brcm,pins:0",
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+ <&frag1>,"cs-gpios:4";
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+ cs0_spidev = <&spidev4_0>,"status";
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
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@@ -0,0 +1,56 @@
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+/dts-v1/;
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+/plugin/;
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+
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+
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+/ {
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+ compatible = "brcm,bcm2838";
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+
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+ fragment@0 {
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+ target = <&spi4_cs_pins>;
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+ frag0: __overlay__ {
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+ brcm,pins = <4 25>;
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+ brcm,function = <1>; /* output */
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&spi4>;
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+ frag1: __overlay__ {
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+ /* needed to avoid dtc warning */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
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+ cs-gpios = <&gpio 4 1>, <&gpio 25 1>;
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+ status = "okay";
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+
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+ spidev4_0: spidev@0 {
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+ compatible = "spidev";
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+ reg = <0>; /* CE0 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <125000000>;
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+ status = "okay";
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+ };
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+
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+ spidev4_1: spidev@1 {
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+ compatible = "spidev";
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+ reg = <1>; /* CE1 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <125000000>;
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+ status = "okay";
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+ };
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+ };
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+ };
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+
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+ __overrides__ {
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+ cs0_pin = <&frag0>,"brcm,pins:0",
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+ <&frag1>,"cs-gpios:4";
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+ cs1_pin = <&frag0>,"brcm,pins:4",
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+ <&frag1>,"cs-gpios:16";
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+ cs0_spidev = <&spidev4_0>,"status";
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+ cs1_spidev = <&spidev4_1>,"status";
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
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@@ -0,0 +1,44 @@
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+/dts-v1/;
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+/plugin/;
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+
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+
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+/ {
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+ compatible = "brcm,bcm2838";
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+
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+ fragment@0 {
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+ target = <&spi5_cs_pins>;
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+ frag0: __overlay__ {
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+ brcm,pins = <12>;
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+ brcm,function = <1>; /* output */
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&spi5>;
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+ frag1: __overlay__ {
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+ /* needed to avoid dtc warning */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
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+ cs-gpios = <&gpio 12 1>;
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+ status = "okay";
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+
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+ spidev5_0: spidev@0 {
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+ compatible = "spidev";
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+ reg = <0>; /* CE0 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <125000000>;
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+ status = "okay";
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+ };
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+ };
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+ };
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+
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+ __overrides__ {
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+ cs0_pin = <&frag0>,"brcm,pins:0",
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+ <&frag1>,"cs-gpios:4";
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+ cs0_spidev = <&spidev5_0>,"status";
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
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@@ -0,0 +1,56 @@
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+/dts-v1/;
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+/plugin/;
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+
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+
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+/ {
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+ compatible = "brcm,bcm2838";
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+
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+ fragment@0 {
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+ target = <&spi5_cs_pins>;
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+ frag0: __overlay__ {
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+ brcm,pins = <12 26>;
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+ brcm,function = <1>; /* output */
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&spi5>;
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+ frag1: __overlay__ {
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+ /* needed to avoid dtc warning */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
|
|
+ cs-gpios = <&gpio 12 1>, <&gpio 26 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev5_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev5_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag0>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&frag0>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ cs0_spidev = <&spidev5_0>,"status";
|
|
+ cs1_spidev = <&spidev5_1>,"status";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2838";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi6_cs_pins>;
|
|
+ frag0: __overlay__ {
|
|
+ brcm,pins = <18>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi6>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
|
|
+ cs-gpios = <&gpio 18 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev6_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag0>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs0_spidev = <&spidev6_0>,"status";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
|
|
@@ -0,0 +1,56 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2838";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi6_cs_pins>;
|
|
+ frag0: __overlay__ {
|
|
+ brcm,pins = <18 27>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi6>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
|
|
+ cs-gpios = <&gpio 18 1>, <&gpio 27 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev6_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev6_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag0>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&frag0>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ cs0_spidev = <&spidev6_0>,"status";
|
|
+ cs1_spidev = <&spidev6_1>,"status";
|
|
+ };
|
|
+};
|