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138 lines
4.3 KiB
Diff
138 lines
4.3 KiB
Diff
From 0c921d542eb4359791cffd1737bf45184f6ae352 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Tue, 12 Jun 2012 10:23:39 +0200
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Subject: [PATCH 2/8] MIPS: BCM63XX: Add flash type detection
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On BCM6358 and BCM6368 the attached flash type is exposed through a
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bootstrapping register. Use it for auto detecting the flash type on
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those and default to parallel flash for earlier SoCs.
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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Cc: linux-mips@linux-mips.org
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Cc: Maxime Bizon <mbizon@freebox.fr>
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Cc: Florian Fainelli <florian@openwrt.org>
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Cc: Kevin Cernekee <cernekee@gmail.com>
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Patchwork: https://patchwork.linux-mips.org/patch/3954/
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Reviewed-by: Florian Fainelli <florian@openwrt.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/bcm63xx/dev-flash.c | 60 ++++++++++++++++++--
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.../include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 6 ++
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arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 9 +++
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3 files changed, 69 insertions(+), 6 deletions(-)
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--- a/arch/mips/bcm63xx/dev-flash.c
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+++ b/arch/mips/bcm63xx/dev-flash.c
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@@ -7,6 +7,7 @@
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*
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* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
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* Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
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+ * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
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*/
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#include <linux/init.h>
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@@ -54,16 +55,63 @@ static struct platform_device mtd_dev =
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},
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};
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-int __init bcm63xx_flash_register(void)
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+static int __init bcm63xx_detect_flash_type(void)
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{
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u32 val;
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- /* read base address of boot chip select (0) */
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- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
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- val &= MPI_CSBASE_BASE_MASK;
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+ switch (bcm63xx_get_cpu_id()) {
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+ case BCM6338_CPU_ID:
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+ case BCM6345_CPU_ID:
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+ case BCM6348_CPU_ID:
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+ /* no way to auto detect so assume parallel */
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+ return BCM63XX_FLASH_TYPE_PARALLEL;
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+ case BCM6358_CPU_ID:
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+ val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
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+ if (val & STRAPBUS_6358_BOOT_SEL_PARALLEL)
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+ return BCM63XX_FLASH_TYPE_PARALLEL;
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+ else
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+ return BCM63XX_FLASH_TYPE_SERIAL;
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+ case BCM6368_CPU_ID:
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+ val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
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+ switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
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+ case STRAPBUS_6368_BOOT_SEL_NAND:
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+ return BCM63XX_FLASH_TYPE_NAND;
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+ case STRAPBUS_6368_BOOT_SEL_SERIAL:
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+ return BCM63XX_FLASH_TYPE_SERIAL;
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+ case STRAPBUS_6368_BOOT_SEL_PARALLEL:
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+ return BCM63XX_FLASH_TYPE_PARALLEL;
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+ }
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+ default:
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+ return -EINVAL;
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+ }
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+}
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+
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+int __init bcm63xx_flash_register(void)
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+{
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+ int flash_type;
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+ u32 val;
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- mtd_resources[0].start = val;
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- mtd_resources[0].end = 0x1FFFFFFF;
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+ flash_type = bcm63xx_detect_flash_type();
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- return platform_device_register(&mtd_dev);
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+ switch (flash_type) {
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+ case BCM63XX_FLASH_TYPE_PARALLEL:
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+ /* read base address of boot chip select (0) */
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+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
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+ val &= MPI_CSBASE_BASE_MASK;
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+
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+ mtd_resources[0].start = val;
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+ mtd_resources[0].end = 0x1FFFFFFF;
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+
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+ return platform_device_register(&mtd_dev);
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+ case BCM63XX_FLASH_TYPE_SERIAL:
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+ pr_warn("unsupported serial flash detected\n");
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+ return -ENODEV;
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+ case BCM63XX_FLASH_TYPE_NAND:
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+ pr_warn("unsupported NAND flash detected\n");
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+ return -ENODEV;
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+ default:
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+ pr_err("flash detection failed for BCM%x: %d\n",
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+ bcm63xx_get_cpu_id(), flash_type);
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+ return -ENODEV;
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+ }
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}
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
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@@ -1,6 +1,12 @@
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#ifndef __BCM63XX_FLASH_H
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#define __BCM63XX_FLASH_H
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+enum {
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+ BCM63XX_FLASH_TYPE_PARALLEL,
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+ BCM63XX_FLASH_TYPE_SERIAL,
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+ BCM63XX_FLASH_TYPE_NAND,
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+};
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+
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int __init bcm63xx_flash_register(void);
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#endif /* __BCM63XX_FLASH_H */
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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@@ -507,6 +507,15 @@
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#define GPIO_BASEMODE_6368_MASK 0x7
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/* those bits must be kept as read in gpio basemode register*/
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+#define GPIO_STRAPBUS_REG 0x40
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+#define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
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+#define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1)
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+#define STRAPBUS_6368_BOOT_SEL_MASK 0x3
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+#define STRAPBUS_6368_BOOT_SEL_NAND 0
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+#define STRAPBUS_6368_BOOT_SEL_SERIAL 1
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+#define STRAPBUS_6368_BOOT_SEL_PARALLEL 3
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+
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+
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/*************************************************************************
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* _REG relative to RSET_ENET
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*************************************************************************/
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