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170 lines
3.9 KiB
C
170 lines
3.9 KiB
C
#ifndef __DIAG_GPIO_H
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#define __DIAG_GPIO_H
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#include <linux/interrupt.h>
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#include <linux/ssb/ssb_embedded.h>
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#include <linux/gpio.h>
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#include <bcm47xx.h>
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static inline u32 gpio_in(void)
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{
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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return ssb_gpio_in(&bcm47xx_bus.ssb, ~0);
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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return bcma_chipco_gpio_in(&bcm47xx_bus.bcma.bus.drv_cc, ~0);
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#endif
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}
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return -EINVAL;
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}
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static inline u32 gpio_out(u32 mask, u32 value)
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{
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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return ssb_gpio_out(&bcm47xx_bus.ssb, mask, value);
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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return bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, mask, value);
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#endif
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}
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return -EINVAL;
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}
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static inline u32 gpio_outen(u32 mask, u32 value)
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{
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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ssb_gpio_outen(&bcm47xx_bus.ssb, mask, value);
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return 0;
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc, mask, value);
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return 0;
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#endif
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}
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return -EINVAL;
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}
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static inline u32 gpio_control(u32 mask, u32 value)
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{
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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return ssb_gpio_control(&bcm47xx_bus.ssb, mask, value);
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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return bcma_chipco_gpio_control(&bcm47xx_bus.bcma.bus.drv_cc, mask, value);
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#endif
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}
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return -EINVAL;
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}
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static inline u32 gpio_setintmask(u32 mask, u32 value)
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{
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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return ssb_gpio_intmask(&bcm47xx_bus.ssb, mask, value);
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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return bcma_chipco_gpio_intmask(&bcm47xx_bus.bcma.bus.drv_cc, mask, value);
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#endif
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}
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return -EINVAL;
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}
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static inline u32 gpio_intpolarity(u32 mask, u32 value)
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{
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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return ssb_gpio_polarity(&bcm47xx_bus.ssb, mask, value);
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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return bcma_chipco_gpio_polarity(&bcm47xx_bus.bcma.bus.drv_cc, mask, value);
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#endif
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}
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return -EINVAL;
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}
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#ifdef CONFIG_BCM47XX_SSB
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static inline u32 __ssb_write32_masked(struct ssb_device *dev, u16 offset,
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u32 mask, u32 value)
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{
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value &= mask;
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value |= ssb_read32(dev, offset) & ~mask;
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ssb_write32(dev, offset, value);
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return value;
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}
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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static inline u32 __bcma_write32_masked(struct bcma_device *dev, u16 offset,
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u32 mask, u32 value)
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{
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value &= mask;
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value |= bcma_read32(dev, offset) & ~mask;
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bcma_write32(dev, offset, value);
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return value;
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}
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#endif
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static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *))
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{
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int irq;
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irq = gpio_to_irq(0);
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if (irq == -EINVAL) return;
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if (enabled) {
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if (request_irq(irq, handler, IRQF_SHARED | IRQF_SAMPLE_RANDOM, "gpio", handler))
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return;
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} else {
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free_irq(irq, handler);
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}
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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if (bcm47xx_bus.ssb.chipco.dev)
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__ssb_write32_masked(bcm47xx_bus.ssb.chipco.dev, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO, (enabled ? SSB_CHIPCO_IRQ_GPIO : 0));
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break;
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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if (bcm47xx_bus.bcma.bus.drv_cc.core)
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__bcma_write32_masked(bcm47xx_bus.bcma.bus.drv_cc.core, BCMA_CC_IRQMASK, BCMA_CC_IRQ_GPIO, (enabled ? BCMA_CC_IRQ_GPIO : 0));
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break;
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#endif
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}
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}
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#define EXTIF_ADDR 0x1f000000
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#define EXTIF_UART (EXTIF_ADDR + 0x00800000)
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#define GPIO_TYPE_NORMAL (0x0 << 24)
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#define GPIO_TYPE_EXTIF (0x1 << 24)
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#define GPIO_TYPE_MASK (0xf << 24)
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static inline void gpio_set_extif(int gpio, int value)
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{
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volatile u8 *addr = (volatile u8 *) KSEG1ADDR(EXTIF_UART) + (gpio & ~GPIO_TYPE_MASK);
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if (value)
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*addr = 0xFF;
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else
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*addr;
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}
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#endif /* __DIAG_GPIO_H */
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