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172 lines
5.3 KiB
Diff
172 lines
5.3 KiB
Diff
From 877119a3f6bce2d9091faa4e51490917be8a3158 Mon Sep 17 00:00:00 2001
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From: Po Liu <po.liu@nxp.com>
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Date: Fri, 15 Nov 2019 03:33:41 +0000
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Subject: [PATCH] enetc: update TSN Qbv PSPEED set according to adjust link
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speed
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ENETC has a register PSPEED to indicate the link speed of hardware.
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It is need to update accordingly. PSPEED field needs to be updated
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with the port speed for QBV scheduling purposes. Or else there is
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chance for gate slot not free by frame taking the MAC if PSPEED and
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phy speed not match. So update PSPEED when link adjust. This is
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implement by the adjust_link.
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Signed-off-by: Po Liu <Po.Liu@nxp.com>
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Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
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Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/ethernet/freescale/enetc/enetc.c | 13 +++++++--
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drivers/net/ethernet/freescale/enetc/enetc.h | 8 ++++++
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drivers/net/ethernet/freescale/enetc/enetc_hw.h | 5 ++++
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drivers/net/ethernet/freescale/enetc/enetc_pf.c | 3 +++
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drivers/net/ethernet/freescale/enetc/enetc_qos.c | 34 ++++++++++++++++++++++++
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5 files changed, 61 insertions(+), 2 deletions(-)
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--- a/drivers/net/ethernet/freescale/enetc/enetc.c
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+++ b/drivers/net/ethernet/freescale/enetc/enetc.c
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@@ -742,9 +742,14 @@ void enetc_get_si_caps(struct enetc_si *
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si->num_rss = 0;
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val = enetc_rd(hw, ENETC_SIPCAPR0);
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if (val & ENETC_SIPCAPR0_RSS) {
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- val = enetc_rd(hw, ENETC_SIRSSCAPR);
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- si->num_rss = ENETC_SIRSSCAPR_GET_NUM_RSS(val);
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+ u32 rss;
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+
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+ rss = enetc_rd(hw, ENETC_SIRSSCAPR);
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+ si->num_rss = ENETC_SIRSSCAPR_GET_NUM_RSS(rss);
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}
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+
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+ if (val & ENETC_SIPCAPR0_QBV)
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+ si->hw_features |= ENETC_SI_F_QBV;
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}
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static int enetc_dma_alloc_bdr(struct enetc_bdr *r, size_t bd_size)
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@@ -1314,8 +1319,12 @@ static void enetc_disable_interrupts(str
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static void adjust_link(struct net_device *ndev)
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{
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+ struct enetc_ndev_priv *priv = netdev_priv(ndev);
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struct phy_device *phydev = ndev->phydev;
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+ if (priv->active_offloads & ENETC_F_QBV)
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+ enetc_sched_speed_set(ndev);
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+
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phy_print_status(phydev);
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}
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--- a/drivers/net/ethernet/freescale/enetc/enetc.h
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+++ b/drivers/net/ethernet/freescale/enetc/enetc.h
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@@ -118,6 +118,8 @@ enum enetc_errata {
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ENETC_ERR_UCMCSWP = BIT(2),
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};
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+#define ENETC_SI_F_QBV BIT(0)
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+
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/* PCI IEP device data */
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struct enetc_si {
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struct pci_dev *pdev;
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@@ -133,6 +135,7 @@ struct enetc_si {
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int num_fs_entries;
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int num_rss; /* number of RSS buckets */
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unsigned short pad;
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+ int hw_features;
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};
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#define ENETC_SI_ALIGN 32
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@@ -173,6 +176,7 @@ struct enetc_cls_rule {
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enum enetc_active_offloads {
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ENETC_F_RX_TSTAMP = BIT(0),
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ENETC_F_TX_TSTAMP = BIT(1),
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+ ENETC_F_QBV = BIT(2),
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};
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struct enetc_ndev_priv {
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@@ -188,6 +192,8 @@ struct enetc_ndev_priv {
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u16 msg_enable;
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int active_offloads;
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+ u32 speed; /* store speed for compare update pspeed */
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+
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struct enetc_bdr *tx_ring[16];
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struct enetc_bdr *rx_ring[16];
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@@ -248,6 +254,8 @@ int enetc_send_cmd(struct enetc_si *si,
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#ifdef CONFIG_FSL_ENETC_QOS
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int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);
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+void enetc_sched_speed_set(struct net_device *ndev);
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#else
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#define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP
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+#define enetc_sched_speed_set(ndev) (void)0
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#endif
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--- a/drivers/net/ethernet/freescale/enetc/enetc_hw.h
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+++ b/drivers/net/ethernet/freescale/enetc/enetc_hw.h
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@@ -149,6 +149,11 @@ enum enetc_bdr_type {TX, RX};
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#define ENETC_PORT_BASE 0x10000
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#define ENETC_PMR 0x0000
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#define ENETC_PMR_EN GENMASK(18, 16)
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+#define ENETC_PMR_PSPEED_MASK GENMASK(11, 8)
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+#define ENETC_PMR_PSPEED_10M 0
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+#define ENETC_PMR_PSPEED_100M BIT(8)
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+#define ENETC_PMR_PSPEED_1000M BIT(9)
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+#define ENETC_PMR_PSPEED_2500M BIT(10)
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#define ENETC_PSR 0x0004 /* RO */
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#define ENETC_PSIPMR 0x0018
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#define ENETC_PSIPMR_SET_UP(n) BIT(n) /* n = SI index */
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--- a/drivers/net/ethernet/freescale/enetc/enetc_pf.c
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+++ b/drivers/net/ethernet/freescale/enetc/enetc_pf.c
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@@ -742,6 +742,9 @@ static void enetc_pf_netdev_setup(struct
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ndev->priv_flags |= IFF_UNICAST_FLT;
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+ if (si->hw_features & ENETC_SI_F_QBV)
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+ priv->active_offloads |= ENETC_F_QBV;
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+
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/* pick up primary MAC address from SI */
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enetc_get_primary_mac_addr(&si->hw, ndev->dev_addr);
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}
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--- a/drivers/net/ethernet/freescale/enetc/enetc_qos.c
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+++ b/drivers/net/ethernet/freescale/enetc/enetc_qos.c
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@@ -11,6 +11,40 @@ static u16 enetc_get_max_gcl_len(struct
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& ENETC_QBV_MAX_GCL_LEN_MASK;
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}
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+void enetc_sched_speed_set(struct net_device *ndev)
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+{
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+ struct enetc_ndev_priv *priv = netdev_priv(ndev);
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+ struct phy_device *phydev = ndev->phydev;
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+ u32 old_speed = priv->speed;
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+ u32 speed, pspeed;
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+
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+ if (phydev->speed == old_speed)
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+ return;
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+
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+ speed = phydev->speed;
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+ switch (speed) {
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+ case SPEED_1000:
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+ pspeed = ENETC_PMR_PSPEED_1000M;
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+ break;
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+ case SPEED_2500:
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+ pspeed = ENETC_PMR_PSPEED_2500M;
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+ break;
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+ case SPEED_100:
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+ pspeed = ENETC_PMR_PSPEED_100M;
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+ break;
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+ case SPEED_10:
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+ default:
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+ pspeed = ENETC_PMR_PSPEED_10M;
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+ netdev_err(ndev, "Qbv PSPEED set speed link down.\n");
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+ }
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+
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+ priv->speed = speed;
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+ enetc_port_wr(&priv->si->hw, ENETC_PMR,
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+ (enetc_port_rd(&priv->si->hw, ENETC_PMR)
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+ & (~ENETC_PMR_PSPEED_MASK))
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+ | pspeed);
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+}
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+
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static int enetc_setup_taprio(struct net_device *ndev,
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struct tc_taprio_qopt_offload *admin_conf)
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{
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