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63 lines
1.8 KiB
Diff
63 lines
1.8 KiB
Diff
From df8cea437a14a4a412a32058ca49a2b30b48cc71 Mon Sep 17 00:00:00 2001
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From: Chuanhua Han <chuanhua.han@nxp.com>
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Date: Fri, 26 Oct 2018 12:08:55 +0800
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Subject: [PATCH] arm64: dts: lx2160a: add dspi controller DT nodes
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Add the dspi support on lx2160
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Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
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Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
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Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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---
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arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 39 ++++++++++++++++++++++++++
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1 file changed, 39 insertions(+)
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--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
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+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
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@@ -603,6 +603,45 @@
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status = "disabled";
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};
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+ dspi0: spi@2100000 {
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+ compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0x0 0x2100000 0x0 0x10000>;
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+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clockgen 4 7>;
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+ clock-names = "dspi";
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+ spi-num-chipselects = <5>;
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+ bus-num = <0>;
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+ status = "disabled";
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+ };
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+
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+ dspi1: spi@2110000 {
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+ compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0x0 0x2110000 0x0 0x10000>;
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+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clockgen 4 7>;
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+ clock-names = "dspi";
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+ spi-num-chipselects = <5>;
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+ bus-num = <1>;
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+ status = "disabled";
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+ };
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+
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+ dspi2: spi@2120000 {
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+ compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0x0 0x2120000 0x0 0x10000>;
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+ interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clockgen 4 7>;
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+ clock-names = "dspi";
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+ spi-num-chipselects = <5>;
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+ bus-num = <2>;
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+ status = "disabled";
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+ };
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+
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esdhc0: esdhc@2140000 {
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compatible = "fsl,esdhc";
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reg = <0x0 0x2140000 0x0 0x10000>;
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