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175 lines
5.2 KiB
Diff
175 lines
5.2 KiB
Diff
From 7a5e03909417ccecc85819837d10cbb6ffe1d759 Mon Sep 17 00:00:00 2001
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From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Date: Tue, 13 Aug 2013 11:43:11 -0300
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Subject: [PATCH 167/203] clocksource: armada-370-xp: Simplify TIMER_CTRL
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register access
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This commit creates two functions to access the TIMER_CTRL register:
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one for global one for the per-cpu. This makes the code much more
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readable. In addition, since the TIMER_CTRL register is also used for
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watchdog, this is preparation work for future thread-safe improvements.
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Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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---
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drivers/clocksource/time-armada-370-xp.c | 69 ++++++++++++++------------------
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1 file changed, 30 insertions(+), 39 deletions(-)
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--- a/drivers/clocksource/time-armada-370-xp.c
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+++ b/drivers/clocksource/time-armada-370-xp.c
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@@ -71,6 +71,18 @@ static u32 ticks_per_jiffy;
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static struct clock_event_device __percpu **percpu_armada_370_xp_evt;
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+static void timer_ctrl_clrset(u32 clr, u32 set)
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+{
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+ writel((readl(timer_base + TIMER_CTRL_OFF) & ~clr) | set,
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+ timer_base + TIMER_CTRL_OFF);
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+}
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+
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+static void local_timer_ctrl_clrset(u32 clr, u32 set)
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+{
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+ writel((readl(local_base + TIMER_CTRL_OFF) & ~clr) | set,
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+ local_base + TIMER_CTRL_OFF);
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+}
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+
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static u32 notrace armada_370_xp_read_sched_clock(void)
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{
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return ~readl(timer_base + TIMER0_VAL_OFF);
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@@ -83,7 +95,6 @@ static int
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armada_370_xp_clkevt_next_event(unsigned long delta,
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struct clock_event_device *dev)
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{
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- u32 u;
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/*
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* Clear clockevent timer interrupt.
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*/
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@@ -97,11 +108,8 @@ armada_370_xp_clkevt_next_event(unsigned
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/*
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* Enable the timer.
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*/
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- u = readl(local_base + TIMER_CTRL_OFF);
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- u = ((u & ~TIMER0_RELOAD_EN) | TIMER0_EN |
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- TIMER0_DIV(TIMER_DIVIDER_SHIFT));
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- writel(u, local_base + TIMER_CTRL_OFF);
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-
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+ local_timer_ctrl_clrset(TIMER0_RELOAD_EN,
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+ TIMER0_EN | TIMER0_DIV(TIMER_DIVIDER_SHIFT));
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return 0;
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}
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@@ -109,8 +117,6 @@ static void
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armada_370_xp_clkevt_mode(enum clock_event_mode mode,
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struct clock_event_device *dev)
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{
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- u32 u;
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-
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if (mode == CLOCK_EVT_MODE_PERIODIC) {
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/*
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@@ -122,18 +128,14 @@ armada_370_xp_clkevt_mode(enum clock_eve
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/*
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* Enable timer.
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*/
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-
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- u = readl(local_base + TIMER_CTRL_OFF);
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-
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- writel((u | TIMER0_EN | TIMER0_RELOAD_EN |
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- TIMER0_DIV(TIMER_DIVIDER_SHIFT)),
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- local_base + TIMER_CTRL_OFF);
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+ local_timer_ctrl_clrset(0, TIMER0_RELOAD_EN |
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+ TIMER0_EN |
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+ TIMER0_DIV(TIMER_DIVIDER_SHIFT));
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} else {
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/*
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* Disable timer.
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*/
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- u = readl(local_base + TIMER_CTRL_OFF);
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- writel(u & ~TIMER0_EN, local_base + TIMER_CTRL_OFF);
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+ local_timer_ctrl_clrset(TIMER0_EN, 0);
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/*
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* ACK pending timer interrupt.
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@@ -169,18 +171,18 @@ static irqreturn_t armada_370_xp_timer_i
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*/
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static int __cpuinit armada_370_xp_timer_setup(struct clock_event_device *evt)
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{
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- u32 u;
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+ u32 clr = 0, set = 0;
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int cpu = smp_processor_id();
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/* Use existing clock_event for cpu 0 */
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if (!smp_processor_id())
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return 0;
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- u = readl(local_base + TIMER_CTRL_OFF);
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if (timer25Mhz)
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- writel(u | TIMER0_25MHZ, local_base + TIMER_CTRL_OFF);
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+ set = TIMER0_25MHZ;
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else
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- writel(u & ~TIMER0_25MHZ, local_base + TIMER_CTRL_OFF);
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+ clr = TIMER0_25MHZ;
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+ local_timer_ctrl_clrset(clr, set);
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evt->name = armada_370_xp_clkevt.name;
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evt->irq = armada_370_xp_clkevt.irq;
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@@ -212,7 +214,7 @@ static struct local_timer_ops armada_370
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static void __init armada_370_xp_timer_init(struct device_node *np)
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{
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- u32 u;
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+ u32 clr = 0, set = 0;
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int res;
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timer_base = of_iomap(np, 0);
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@@ -221,29 +223,20 @@ static void __init armada_370_xp_timer_i
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if (of_find_property(np, "marvell,timer-25Mhz", NULL)) {
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/* The fixed 25MHz timer is available so let's use it */
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- u = readl(local_base + TIMER_CTRL_OFF);
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- writel(u | TIMER0_25MHZ,
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- local_base + TIMER_CTRL_OFF);
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- u = readl(timer_base + TIMER_CTRL_OFF);
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- writel(u | TIMER0_25MHZ,
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- timer_base + TIMER_CTRL_OFF);
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+ set = TIMER0_25MHZ;
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timer_clk = 25000000;
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} else {
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unsigned long rate = 0;
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struct clk *clk = of_clk_get(np, 0);
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WARN_ON(IS_ERR(clk));
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rate = clk_get_rate(clk);
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- u = readl(local_base + TIMER_CTRL_OFF);
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- writel(u & ~(TIMER0_25MHZ),
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- local_base + TIMER_CTRL_OFF);
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-
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- u = readl(timer_base + TIMER_CTRL_OFF);
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- writel(u & ~(TIMER0_25MHZ),
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- timer_base + TIMER_CTRL_OFF);
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-
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timer_clk = rate / TIMER_DIVIDER;
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+
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+ clr = TIMER0_25MHZ;
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timer25Mhz = false;
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}
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+ timer_ctrl_clrset(clr, set);
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+ local_timer_ctrl_clrset(clr, set);
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/*
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* We use timer 0 as clocksource, and private(local) timer 0
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@@ -265,10 +258,8 @@ static void __init armada_370_xp_timer_i
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writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
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writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
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- u = readl(timer_base + TIMER_CTRL_OFF);
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-
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- writel((u | TIMER0_EN | TIMER0_RELOAD_EN |
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- TIMER0_DIV(TIMER_DIVIDER_SHIFT)), timer_base + TIMER_CTRL_OFF);
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+ timer_ctrl_clrset(0, TIMER0_EN | TIMER0_RELOAD_EN |
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+ TIMER0_DIV(TIMER_DIVIDER_SHIFT));
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clocksource_mmio_init(timer_base + TIMER0_VAL_OFF,
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"armada_370_xp_clocksource",
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