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24 lines
848 B
Diff
24 lines
848 B
Diff
From 08b085a07efe12568d86dff064e6f089e2971744 Mon Sep 17 00:00:00 2001
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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Date: Mon, 25 May 2015 22:39:50 +0200
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Subject: gpio-stp-xway: Fix enabling the highest bit of the PHY LEDs
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0x3 only masks two bits, but three bits have to be allowed. This fixes
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GPHY0 LED2 (which is the highest bit of phy2) on my board.
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Acked-by: John Crispin <blogic@openwrt.org>
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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--- a/drivers/gpio/gpio-stp-xway.c
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+++ b/drivers/gpio/gpio-stp-xway.c
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@@ -58,7 +58,7 @@
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#define XWAY_STP_ADSL_MASK 0x3
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/* 2 groups of 3 bits can be driven by the phys */
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-#define XWAY_STP_PHY_MASK 0x3
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+#define XWAY_STP_PHY_MASK 0x7
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#define XWAY_STP_PHY1_SHIFT 27
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#define XWAY_STP_PHY2_SHIFT 15
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