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47 lines
1.5 KiB
Diff
47 lines
1.5 KiB
Diff
From 4be54c3a495f08c05a8e485566e5b88cd3537f16 Mon Sep 17 00:00:00 2001
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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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Date: Fri, 13 Mar 2020 21:09:13 +0100
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Subject: [PATCH] staging: mt7621-pci: delete no more needed
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'mt7621_reset_port'
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After review all the resets at the beggining the function
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'mt7621_reset_port' is not needed anymore. Hence delete it
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and its uses.
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Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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Link: https://lore.kernel.org/r/20200313200913.24321-7-sergio.paracuellos@gmail.com
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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drivers/staging/mt7621-pci/pci-mt7621.c | 13 -------------
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1 file changed, 13 deletions(-)
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--- a/drivers/staging/mt7621-pci/pci-mt7621.c
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+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
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@@ -255,13 +255,6 @@ static inline void mt7621_control_deasse
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reset_control_assert(port->pcie_rst);
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}
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-static void mt7621_reset_port(struct mt7621_pcie_port *port)
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-{
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- mt7621_control_assert(port);
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- msleep(100);
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- mt7621_control_deassert(port);
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-}
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-
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static void setup_cm_memory_region(struct mt7621_pcie *pcie)
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{
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struct resource *mem_resource = &pcie->mem;
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@@ -427,12 +420,6 @@ static int mt7621_pcie_init_port(struct
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u32 slot = port->slot;
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int err;
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- /*
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- * Any MT7621 Ralink pcie controller that doesn't have 0x0101 at
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- * the end of the chip_id has inverted PCI resets.
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- */
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- mt7621_reset_port(port);
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-
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err = phy_init(port->phy);
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if (err) {
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dev_err(dev, "failed to initialize port%d phy\n", slot);
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