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125 lines
4.1 KiB
Diff
125 lines
4.1 KiB
Diff
From 63c3fd953a620873c722494355a345643607c0a2 Mon Sep 17 00:00:00 2001
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From: Robin Gong <yibin.gong@nxp.com>
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Date: Thu, 11 Apr 2019 14:36:37 +0800
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Subject: [PATCH] MLK-21443: dmaengine: fsl-edma-v3: clear pending irq before
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request irq
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edma interrupt maybe happened during reboot or watchdog reset, meanwhile
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gic never power down on i.mx8QM/QXP, thus the unexpect irq will come in
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once edma driver request irq at probe phase. Unfortunately, at that time
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that edma channel's power domain which power-up by customer driver such
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as audio/uart driver may not be ready, so kernel panic triggered once
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touch such edma registers which still not power up in interrupt handler.
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Move request irq from probe to alloc dma channel so that edma channel's
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power domain has already been powered, besides, clear meaningless
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interrupt before request irq.
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Signed-off-by: Robin Gong <yibin.gong@nxp.com>
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Acked-by: Fugang Duan <fugang.duan@nxp.com>
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(cherry picked from commit 0a0d8f8b944094342fda18f23f3ac13b8a73871d)
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---
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drivers/dma/fsl-edma-v3.c | 34 ++++++++++++++++++++++------------
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1 file changed, 22 insertions(+), 12 deletions(-)
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--- a/drivers/dma/fsl-edma-v3.c
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+++ b/drivers/dma/fsl-edma-v3.c
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@@ -162,7 +162,8 @@ struct fsl_edma3_chan {
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int is_dfifo;
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struct dma_pool *tcd_pool;
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u32 chn_real_count;
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- char txirq_name[32];
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+ char txirq_name[32];
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+ struct platform_device *pdev;
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};
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struct fsl_edma3_desc {
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@@ -180,6 +181,7 @@ struct fsl_edma3_reg_save {
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struct fsl_edma3_engine {
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struct dma_device dma_dev;
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+ unsigned long irqflag;
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struct mutex fsl_edma3_mutex;
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u32 n_chans;
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int errirq;
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@@ -790,10 +792,23 @@ static struct dma_chan *fsl_edma3_xlate(
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static int fsl_edma3_alloc_chan_resources(struct dma_chan *chan)
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{
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struct fsl_edma3_chan *fsl_chan = to_fsl_edma3_chan(chan);
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+ struct platform_device *pdev = fsl_chan->pdev;
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+ int ret;
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fsl_chan->tcd_pool = dma_pool_create("tcd_pool", chan->device->dev,
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sizeof(struct fsl_edma3_hw_tcd),
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32, 0);
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+ /* clear meaningless pending irq anyway */
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+ writel(1, fsl_chan->membase + EDMA_CH_INT);
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+ ret = devm_request_irq(&pdev->dev, fsl_chan->txirq,
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+ fsl_edma3_tx_handler, fsl_chan->edma3->irqflag,
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+ fsl_chan->txirq_name, fsl_chan);
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+ if (ret) {
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+ dev_err(&pdev->dev, "Can't register %s IRQ.\n",
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+ fsl_chan->txirq_name);
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+ return ret;
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+ }
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+
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return 0;
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}
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@@ -803,6 +818,8 @@ static void fsl_edma3_free_chan_resource
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unsigned long flags;
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LIST_HEAD(head);
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+ devm_free_irq(&fsl_chan->pdev->dev, fsl_chan->txirq, fsl_chan);
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+
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spin_lock_irqsave(&fsl_chan->vchan.lock, flags);
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fsl_edma3_disable_request(fsl_chan);
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fsl_chan->edesc = NULL;
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@@ -830,7 +847,6 @@ static int fsl_edma3_probe(struct platfo
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struct resource *res;
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int len, chans;
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int ret, i;
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- unsigned long irqflag = 0;
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ret = of_property_read_u32(np, "dma-channels", &chans);
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if (ret) {
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@@ -845,7 +861,7 @@ static int fsl_edma3_probe(struct platfo
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/* Audio edma rx/tx channel shared interrupt */
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if (of_property_read_bool(np, "shared-interrupt"))
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- irqflag = IRQF_SHARED;
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+ fsl_edma3->irqflag = IRQF_SHARED;
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fsl_edma3->swap = of_device_is_compatible(np, "fsl,imx8qm-adma");
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fsl_edma3->n_chans = chans;
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@@ -853,12 +869,13 @@ static int fsl_edma3_probe(struct platfo
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INIT_LIST_HEAD(&fsl_edma3->dma_dev.channels);
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for (i = 0; i < fsl_edma3->n_chans; i++) {
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struct fsl_edma3_chan *fsl_chan = &fsl_edma3->chans[i];
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- const char *txirq_name = fsl_chan->txirq_name;
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+ const char *txirq_name;
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char chanid[3], id_len = 0;
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char *p = chanid;
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unsigned long val;
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fsl_chan->edma3 = fsl_edma3;
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+ fsl_chan->pdev = pdev;
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fsl_chan->pm_state = RUNNING;
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fsl_chan->idle = true;
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/* Get per channel membase */
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@@ -904,14 +921,7 @@ static int fsl_edma3_probe(struct platfo
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return fsl_chan->txirq;
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}
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- ret = devm_request_irq(&pdev->dev, fsl_chan->txirq,
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- fsl_edma3_tx_handler, irqflag, txirq_name,
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- fsl_chan);
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- if (ret) {
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- dev_err(&pdev->dev, "Can't register %s IRQ.\n",
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- txirq_name);
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- return ret;
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- }
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+ memcpy(fsl_chan->txirq_name, txirq_name, strlen(txirq_name));
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fsl_chan->vchan.desc_free = fsl_edma3_free_desc;
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vchan_init(&fsl_chan->vchan, &fsl_edma3->dma_dev);
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