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562 lines
18 KiB
Diff
562 lines
18 KiB
Diff
From f79915995e8fe4f2d11043fe4cab4b579e5cf1de Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Horia=20Geant=C4=83?= <horia.geanta@nxp.com>
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Date: Wed, 10 Oct 2018 16:06:11 +0300
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Subject: [PATCH] crypto: caam/qi2 - add (unused) dpseci API
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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During driver upstreaming all unused dpseci API was trimmed down.
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Add the API back to be in sync with files provided by MC f/w release.
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Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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---
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drivers/crypto/caam/dpseci.c | 330 ++++++++++++++++++++++++++++++++++++++-
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drivers/crypto/caam/dpseci.h | 50 ++++++
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drivers/crypto/caam/dpseci_cmd.h | 59 +++++++
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3 files changed, 437 insertions(+), 2 deletions(-)
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--- a/drivers/crypto/caam/dpseci.c
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+++ b/drivers/crypto/caam/dpseci.c
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@@ -16,8 +16,8 @@
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* @token: Returned token; use in subsequent API calls
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*
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* This function can be used to open a control session for an already created
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- * object; an object may have been declared statically in the DPL
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- * or created dynamically.
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+ * object; an object may have been declared in the DPL or by calling the
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+ * dpseci_create() function.
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* This function returns a unique authentication token, associated with the
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* specific object ID and the specific MC portal; this token must be used in all
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* subsequent commands for this specific object.
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@@ -67,6 +67,85 @@ int dpseci_close(struct fsl_mc_io *mc_io
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}
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/**
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+ * dpseci_create() - Create the DPSECI object
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @dprc_token: Parent container token; '0' for default container
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @cfg: Configuration structure
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+ * @obj_id: returned object id
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+ *
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+ * Create the DPSECI object, allocate required resources and perform required
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+ * initialization.
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+ *
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+ * The object can be created either by declaring it in the DPL file, or by
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+ * calling this function.
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+ *
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+ * The function accepts an authentication token of a parent container that this
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+ * object should be assigned to. The token can be '0' so the object will be
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+ * assigned to the default container.
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+ * The newly created object can be opened with the returned object id and using
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+ * the container's associated tokens and MC portals.
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+ *
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+ * Return: '0' on success, error code otherwise
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+ */
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+int dpseci_create(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags,
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+ const struct dpseci_cfg *cfg, u32 *obj_id)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+ struct dpseci_cmd_create *cmd_params;
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+ int i, err;
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+
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+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_CREATE,
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+ cmd_flags,
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+ dprc_token);
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+ cmd_params = (struct dpseci_cmd_create *)cmd.params;
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+ for (i = 0; i < 8; i++)
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+ cmd_params->priorities[i] = cfg->priorities[i];
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+ for (i = 0; i < 8; i++)
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+ cmd_params->priorities2[i] = cfg->priorities[8 + i];
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+ cmd_params->num_tx_queues = cfg->num_tx_queues;
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+ cmd_params->num_rx_queues = cfg->num_rx_queues;
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+ cmd_params->options = cpu_to_le32(cfg->options);
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+ err = mc_send_command(mc_io, &cmd);
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+ if (err)
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+ return err;
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+
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+ *obj_id = mc_cmd_read_object_id(&cmd);
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+
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+ return 0;
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+}
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+
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+/**
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+ * dpseci_destroy() - Destroy the DPSECI object and release all its resources
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @dprc_token: Parent container token; '0' for default container
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @object_id: The object id; it must be a valid id within the container that
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+ * created this object
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+ *
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+ * The function accepts the authentication token of the parent container that
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+ * created the object (not the one that currently owns the object). The object
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+ * is searched within parent using the provided 'object_id'.
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+ * All tokens to the object must be closed before calling destroy.
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+ *
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+ * Return: '0' on success, error code otherwise
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+ */
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+int dpseci_destroy(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags,
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+ u32 object_id)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+ struct dpseci_cmd_destroy *cmd_params;
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+
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+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_DESTROY,
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+ cmd_flags,
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+ dprc_token);
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+ cmd_params = (struct dpseci_cmd_destroy *)cmd.params;
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+ cmd_params->object_id = cpu_to_le32(object_id);
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+
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+ return mc_send_command(mc_io, &cmd);
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+}
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+
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+/**
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* dpseci_enable() - Enable the DPSECI, allow sending and receiving frames
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* @mc_io: Pointer to MC portal's I/O object
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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@@ -133,6 +212,217 @@ int dpseci_is_enabled(struct fsl_mc_io *
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}
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/**
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+ * dpseci_reset() - Reset the DPSECI, returns the object to initial state.
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @token: Token of DPSECI object
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+ *
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+ * Return: '0' on success, error code otherwise
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+ */
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+int dpseci_reset(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+
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+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_RESET,
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+ cmd_flags,
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+ token);
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+
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+ return mc_send_command(mc_io, &cmd);
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+}
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+
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+/**
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+ * dpseci_get_irq_enable() - Get overall interrupt state
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @token: Token of DPSECI object
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+ * @irq_index: The interrupt index to configure
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+ * @en: Returned Interrupt state - enable = 1, disable = 0
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+ *
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+ * Return: '0' on success, error code otherwise
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+ */
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+int dpseci_get_irq_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ u8 irq_index, u8 *en)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+ struct dpseci_cmd_irq_enable *cmd_params;
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+ struct dpseci_rsp_get_irq_enable *rsp_params;
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+ int err;
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+
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+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_ENABLE,
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+ cmd_flags,
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+ token);
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+ cmd_params = (struct dpseci_cmd_irq_enable *)cmd.params;
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+ cmd_params->irq_index = irq_index;
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+ err = mc_send_command(mc_io, &cmd);
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+ if (err)
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+ return err;
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+
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+ rsp_params = (struct dpseci_rsp_get_irq_enable *)cmd.params;
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+ *en = rsp_params->enable_state;
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+
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+ return 0;
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+}
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+
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+/**
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+ * dpseci_set_irq_enable() - Set overall interrupt state.
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @token: Token of DPSECI object
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+ * @irq_index: The interrupt index to configure
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+ * @en: Interrupt state - enable = 1, disable = 0
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+ *
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+ * Allows GPP software to control when interrupts are generated.
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+ * Each interrupt can have up to 32 causes. The enable/disable control's the
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+ * overall interrupt state. If the interrupt is disabled no causes will cause
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+ * an interrupt.
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+ *
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+ * Return: '0' on success, error code otherwise
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+ */
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+int dpseci_set_irq_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ u8 irq_index, u8 en)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+ struct dpseci_cmd_irq_enable *cmd_params;
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+
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+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_IRQ_ENABLE,
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+ cmd_flags,
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+ token);
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+ cmd_params = (struct dpseci_cmd_irq_enable *)cmd.params;
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+ cmd_params->irq_index = irq_index;
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+ cmd_params->enable_state = en;
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+
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+ return mc_send_command(mc_io, &cmd);
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+}
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+
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+/**
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+ * dpseci_get_irq_mask() - Get interrupt mask.
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @token: Token of DPSECI object
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+ * @irq_index: The interrupt index to configure
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+ * @mask: Returned event mask to trigger interrupt
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+ *
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+ * Every interrupt can have up to 32 causes and the interrupt model supports
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+ * masking/unmasking each cause independently.
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+ *
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+ * Return: '0' on success, error code otherwise
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+ */
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+int dpseci_get_irq_mask(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ u8 irq_index, u32 *mask)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+ struct dpseci_cmd_irq_mask *cmd_params;
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+ int err;
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+
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+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_MASK,
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+ cmd_flags,
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+ token);
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+ cmd_params = (struct dpseci_cmd_irq_mask *)cmd.params;
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+ cmd_params->irq_index = irq_index;
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+ err = mc_send_command(mc_io, &cmd);
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+ if (err)
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+ return err;
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+
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+ *mask = le32_to_cpu(cmd_params->mask);
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+
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+ return 0;
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+}
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+
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+/**
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+ * dpseci_set_irq_mask() - Set interrupt mask.
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @token: Token of DPSECI object
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+ * @irq_index: The interrupt index to configure
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+ * @mask: event mask to trigger interrupt;
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+ * each bit:
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+ * 0 = ignore event
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+ * 1 = consider event for asserting IRQ
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+ *
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+ * Every interrupt can have up to 32 causes and the interrupt model supports
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+ * masking/unmasking each cause independently
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+ *
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+ * Return: '0' on success, error code otherwise
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+ */
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+int dpseci_set_irq_mask(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ u8 irq_index, u32 mask)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+ struct dpseci_cmd_irq_mask *cmd_params;
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+
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+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_IRQ_MASK,
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+ cmd_flags,
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+ token);
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+ cmd_params = (struct dpseci_cmd_irq_mask *)cmd.params;
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+ cmd_params->mask = cpu_to_le32(mask);
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+ cmd_params->irq_index = irq_index;
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+
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+ return mc_send_command(mc_io, &cmd);
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+}
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+
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+/**
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+ * dpseci_get_irq_status() - Get the current status of any pending interrupts
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @token: Token of DPSECI object
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+ * @irq_index: The interrupt index to configure
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+ * @status: Returned interrupts status - one bit per cause:
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+ * 0 = no interrupt pending
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+ * 1 = interrupt pending
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+ *
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+ * Return: '0' on success, error code otherwise
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+ */
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+int dpseci_get_irq_status(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ u8 irq_index, u32 *status)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+ struct dpseci_cmd_irq_status *cmd_params;
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+ int err;
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+
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+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_STATUS,
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+ cmd_flags,
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+ token);
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+ cmd_params = (struct dpseci_cmd_irq_status *)cmd.params;
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+ cmd_params->status = cpu_to_le32(*status);
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+ cmd_params->irq_index = irq_index;
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+ err = mc_send_command(mc_io, &cmd);
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+ if (err)
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+ return err;
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+
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+ *status = le32_to_cpu(cmd_params->status);
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+
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+ return 0;
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+}
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+
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+/**
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+ * dpseci_clear_irq_status() - Clear a pending interrupt's status
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @token: Token of DPSECI object
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+ * @irq_index: The interrupt index to configure
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+ * @status: bits to clear (W1C) - one bit per cause:
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+ * 0 = don't change
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+ * 1 = clear status bit
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+ *
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+ * Return: '0' on success, error code otherwise
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+ */
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+int dpseci_clear_irq_status(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ u8 irq_index, u32 status)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+ struct dpseci_cmd_irq_status *cmd_params;
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+
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+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_CLEAR_IRQ_STATUS,
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+ cmd_flags,
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+ token);
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+ cmd_params = (struct dpseci_cmd_irq_status *)cmd.params;
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+ cmd_params->status = cpu_to_le32(status);
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+ cmd_params->irq_index = irq_index;
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+
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+ return mc_send_command(mc_io, &cmd);
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+}
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+
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+/**
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* dpseci_get_attributes() - Retrieve DPSECI attributes
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* @mc_io: Pointer to MC portal's I/O object
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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@@ -320,6 +610,42 @@ int dpseci_get_sec_attr(struct fsl_mc_io
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return 0;
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}
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+
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+/**
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+ * dpseci_get_sec_counters() - Retrieve SEC accelerator counters
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @token: Token of DPSECI object
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+ * @counters: Returned SEC counters
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+ *
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+ * Return: '0' on success, error code otherwise
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+ */
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+int dpseci_get_sec_counters(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ struct dpseci_sec_counters *counters)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+ struct dpseci_rsp_get_sec_counters *rsp_params;
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+ int err;
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+
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+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_SEC_COUNTERS,
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+ cmd_flags,
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+ token);
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+ err = mc_send_command(mc_io, &cmd);
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+ if (err)
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+ return err;
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+
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+ rsp_params = (struct dpseci_rsp_get_sec_counters *)cmd.params;
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+ counters->dequeued_requests =
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+ le64_to_cpu(rsp_params->dequeued_requests);
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+ counters->ob_enc_requests = le64_to_cpu(rsp_params->ob_enc_requests);
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+ counters->ib_dec_requests = le64_to_cpu(rsp_params->ib_dec_requests);
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+ counters->ob_enc_bytes = le64_to_cpu(rsp_params->ob_enc_bytes);
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+ counters->ob_prot_bytes = le64_to_cpu(rsp_params->ob_prot_bytes);
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+ counters->ib_dec_bytes = le64_to_cpu(rsp_params->ib_dec_bytes);
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+ counters->ib_valid_bytes = le64_to_cpu(rsp_params->ib_valid_bytes);
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+
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+ return 0;
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+}
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/**
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* dpseci_get_api_version() - Get Data Path SEC Interface API version
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--- a/drivers/crypto/caam/dpseci.h
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+++ b/drivers/crypto/caam/dpseci.h
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@@ -55,6 +55,12 @@ struct dpseci_cfg {
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u8 priorities[DPSECI_MAX_QUEUE_NUM];
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};
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+int dpseci_create(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags,
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+ const struct dpseci_cfg *cfg, u32 *obj_id);
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+
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+int dpseci_destroy(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags,
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+ u32 object_id);
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+
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int dpseci_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token);
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int dpseci_disable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token);
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@@ -62,6 +68,26 @@ int dpseci_disable(struct fsl_mc_io *mc_
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int dpseci_is_enabled(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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int *en);
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+int dpseci_reset(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token);
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+
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+int dpseci_get_irq_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ u8 irq_index, u8 *en);
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+
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+int dpseci_set_irq_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ u8 irq_index, u8 en);
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+
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+int dpseci_get_irq_mask(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ u8 irq_index, u32 *mask);
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+
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+int dpseci_set_irq_mask(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ u8 irq_index, u32 mask);
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+
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+int dpseci_get_irq_status(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ u8 irq_index, u32 *status);
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+
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+int dpseci_clear_irq_status(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ u8 irq_index, u32 status);
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+
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/**
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* struct dpseci_attr - Structure representing DPSECI attributes
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* @id: DPSECI object ID
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@@ -248,6 +274,30 @@ struct dpseci_sec_attr {
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int dpseci_get_sec_attr(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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struct dpseci_sec_attr *attr);
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+/**
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+ * struct dpseci_sec_counters - Structure representing global SEC counters and
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+ * not per dpseci counters
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+ * @dequeued_requests: Number of Requests Dequeued
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+ * @ob_enc_requests: Number of Outbound Encrypt Requests
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+ * @ib_dec_requests: Number of Inbound Decrypt Requests
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+ * @ob_enc_bytes: Number of Outbound Bytes Encrypted
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+ * @ob_prot_bytes: Number of Outbound Bytes Protected
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+ * @ib_dec_bytes: Number of Inbound Bytes Decrypted
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+ * @ib_valid_bytes: Number of Inbound Bytes Validated
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+ */
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+struct dpseci_sec_counters {
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+ u64 dequeued_requests;
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+ u64 ob_enc_requests;
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+ u64 ib_dec_requests;
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+ u64 ob_enc_bytes;
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+ u64 ob_prot_bytes;
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+ u64 ib_dec_bytes;
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+ u64 ib_valid_bytes;
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+};
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+
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+int dpseci_get_sec_counters(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
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+ struct dpseci_sec_counters *counters);
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+
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int dpseci_get_api_version(struct fsl_mc_io *mc_io, u32 cmd_flags,
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u16 *major_ver, u16 *minor_ver);
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--- a/drivers/crypto/caam/dpseci_cmd.h
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+++ b/drivers/crypto/caam/dpseci_cmd.h
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@@ -17,6 +17,7 @@
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/* Command versioning */
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#define DPSECI_CMD_BASE_VERSION 1
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#define DPSECI_CMD_BASE_VERSION_V2 2
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+#define DPSECI_CMD_BASE_VERSION_V3 3
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#define DPSECI_CMD_ID_OFFSET 4
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#define DPSECI_CMD_V1(id) (((id) << DPSECI_CMD_ID_OFFSET) | \
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@@ -25,20 +26,34 @@
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#define DPSECI_CMD_V2(id) (((id) << DPSECI_CMD_ID_OFFSET) | \
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DPSECI_CMD_BASE_VERSION_V2)
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+#define DPSECI_CMD_V3(id) (((id) << DPSECI_CMD_ID_OFFSET) | \
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+ DPSECI_CMD_BASE_VERSION_V3)
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+
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/* Command IDs */
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#define DPSECI_CMDID_CLOSE DPSECI_CMD_V1(0x800)
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#define DPSECI_CMDID_OPEN DPSECI_CMD_V1(0x809)
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+#define DPSECI_CMDID_CREATE DPSECI_CMD_V3(0x909)
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+#define DPSECI_CMDID_DESTROY DPSECI_CMD_V1(0x989)
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#define DPSECI_CMDID_GET_API_VERSION DPSECI_CMD_V1(0xa09)
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#define DPSECI_CMDID_ENABLE DPSECI_CMD_V1(0x002)
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#define DPSECI_CMDID_DISABLE DPSECI_CMD_V1(0x003)
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#define DPSECI_CMDID_GET_ATTR DPSECI_CMD_V1(0x004)
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+#define DPSECI_CMDID_RESET DPSECI_CMD_V1(0x005)
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#define DPSECI_CMDID_IS_ENABLED DPSECI_CMD_V1(0x006)
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|
|
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+#define DPSECI_CMDID_SET_IRQ_ENABLE DPSECI_CMD_V1(0x012)
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+#define DPSECI_CMDID_GET_IRQ_ENABLE DPSECI_CMD_V1(0x013)
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+#define DPSECI_CMDID_SET_IRQ_MASK DPSECI_CMD_V1(0x014)
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+#define DPSECI_CMDID_GET_IRQ_MASK DPSECI_CMD_V1(0x015)
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|
+#define DPSECI_CMDID_GET_IRQ_STATUS DPSECI_CMD_V1(0x016)
|
|
+#define DPSECI_CMDID_CLEAR_IRQ_STATUS DPSECI_CMD_V1(0x017)
|
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+
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|
#define DPSECI_CMDID_SET_RX_QUEUE DPSECI_CMD_V1(0x194)
|
|
#define DPSECI_CMDID_GET_RX_QUEUE DPSECI_CMD_V1(0x196)
|
|
#define DPSECI_CMDID_GET_TX_QUEUE DPSECI_CMD_V1(0x197)
|
|
#define DPSECI_CMDID_GET_SEC_ATTR DPSECI_CMD_V2(0x198)
|
|
+#define DPSECI_CMDID_GET_SEC_COUNTERS DPSECI_CMD_V1(0x199)
|
|
#define DPSECI_CMDID_SET_CONGESTION_NOTIFICATION DPSECI_CMD_V1(0x170)
|
|
#define DPSECI_CMDID_GET_CONGESTION_NOTIFICATION DPSECI_CMD_V1(0x171)
|
|
|
|
@@ -57,6 +72,20 @@ struct dpseci_cmd_open {
|
|
__le32 dpseci_id;
|
|
};
|
|
|
|
+struct dpseci_cmd_create {
|
|
+ u8 priorities[8];
|
|
+ u8 num_tx_queues;
|
|
+ u8 num_rx_queues;
|
|
+ u8 pad0[6];
|
|
+ __le32 options;
|
|
+ __le32 pad1;
|
|
+ u8 priorities2[8];
|
|
+};
|
|
+
|
|
+struct dpseci_cmd_destroy {
|
|
+ __le32 object_id;
|
|
+};
|
|
+
|
|
#define DPSECI_ENABLE_SHIFT 0
|
|
#define DPSECI_ENABLE_SIZE 1
|
|
|
|
@@ -64,6 +93,26 @@ struct dpseci_rsp_is_enabled {
|
|
u8 is_enabled;
|
|
};
|
|
|
|
+struct dpseci_cmd_irq_enable {
|
|
+ u8 enable_state;
|
|
+ u8 pad[3];
|
|
+ u8 irq_index;
|
|
+};
|
|
+
|
|
+struct dpseci_rsp_get_irq_enable {
|
|
+ u8 enable_state;
|
|
+};
|
|
+
|
|
+struct dpseci_cmd_irq_mask {
|
|
+ __le32 mask;
|
|
+ u8 irq_index;
|
|
+};
|
|
+
|
|
+struct dpseci_cmd_irq_status {
|
|
+ __le32 status;
|
|
+ u8 irq_index;
|
|
+};
|
|
+
|
|
struct dpseci_rsp_get_attributes {
|
|
__le32 id;
|
|
__le32 pad0;
|
|
@@ -125,6 +174,16 @@ struct dpseci_rsp_get_sec_attr {
|
|
u8 ptha_acc_num;
|
|
};
|
|
|
|
+struct dpseci_rsp_get_sec_counters {
|
|
+ __le64 dequeued_requests;
|
|
+ __le64 ob_enc_requests;
|
|
+ __le64 ib_dec_requests;
|
|
+ __le64 ob_enc_bytes;
|
|
+ __le64 ob_prot_bytes;
|
|
+ __le64 ib_dec_bytes;
|
|
+ __le64 ib_valid_bytes;
|
|
+};
|
|
+
|
|
struct dpseci_rsp_get_api_version {
|
|
__le16 major;
|
|
__le16 minor;
|