From 384ec5ed82845c2c81968743dde4a758f572c11b Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sat, 13 Jul 2019 11:52:29 +0200 Subject: [PATCH] ARM: dts: gemini: Fix up confused pin settings The SL93512r board has its pin muxing set up for the wrong ASIC: SL3516 instead of SL3512 that it is using. Fix it up and reference the right GPIO for the WPS button. Signed-off-by: Linus Walleij --- arch/arm/boot/dts/gemini-sl93512r.dts | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) --- a/arch/arm/boot/dts/gemini-sl93512r.dts +++ b/arch/arm/boot/dts/gemini-sl93512r.dts @@ -36,8 +36,8 @@ wakeup-source; linux,code = ; label = "WPS"; - /* Conflict with NAND flash */ - gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; + /* Conflicts with TVC and extended flash */ + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; }; button-setup { @@ -153,17 +153,20 @@ syscon: syscon@40000000 { pinctrl { /* - * gpio0egrp cover line 16 used by HD LED - * gpio0fgrp cover line 17, 18 used by wireless LED and reset button - * gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY - * gpio0kgrp cover line 31 used by USB LED + * gpio0agrp cover line 0, used by WPS button + * gpio0fgrp cover line 16 used by HD LED + * gpio0ggrp cover line 17, 18 used by wireless LAN LED and + * reset button OR USB ID select on 17 and USB VBUS select + * on 18. (Confusing.) + * gpio0igrp cover line 21, 22 used by MDIO for Marvell PHY */ gpio0_default_pins: pinctrl-gpio0 { mux { function = "gpio0"; - groups = "gpio0egrp", + groups = "gpio0agrp", "gpio0fgrp", - "gpio0hgrp"; + "gpio0ggrp", + "gpio0igrp"; }; }; /*