From c7c8fa7f5b5ee9bea751fa7bdae8ff4acde8f26e Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 27 Jul 2016 11:36:00 +0200 Subject: [PATCH 06/16] Documentation: add BCM6358 pincontroller binding documentation Add binding documentation for the pincontrol core found in BCM6358 SoCs. Signed-off-by: Jonas Gorski --- .../bindings/pinctrl/brcm,bcm6358-pinctrl.txt | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt @@ -0,0 +1,44 @@ +* Broadcom BCM6358 pin controller + +Required properties: +- compatible: Must be "brcm,bcm6358-pinctrl". +- reg: Register specifiers of dirout, dat registers. +- reg-names: Must be "dirout", "dat". +- brcm,gpiomode: Phandle to the shared gpiomode register. +- gpio-controller: Identifies this node as a gpio-controller. +- #gpio-cells: Must be <2>. + +Example: + +pinctrl: pin-controller@fffe0080 { + compatible = "brcm,bcm6358-pinctrl"; + reg = <0xfffe0080 0x8>, + <0xfffe0088 0x8>, + <0xfffe0098 0x4>; + reg-names = "dirout", "dat"; + brcm,gpiomode = <&gpiomode>; + + gpio-controller; + #gpio-cells = <2>; +}; + +gpiomode: syscon@fffe0098 { + compatible = "brcm,bcm6358-gpiomode", "syscon"; + reg = <0xfffe0098 0x4>; + native-endian; +}; + +Available pins/groups and functions: + +name pins functions +----------------------------------------------------------- +ebi_cs_grp 30-31 ebi_cs +uart1_grp 28-31 uart1 +spi_cs_grp 32-33 spi_cs +async_modem_grp 12-15 async_modem +legacy_led_grp 9-15 legacy_led +serial_led_grp 6-7 serial_led +led_grp 0-3 led +utopia_grp 12-15, 22-31 utopia +pwm_syn_clk_grp 8 pwm_syn_clk +sys_irq_grp 5 sys_irq