From 5ede027f6c4a57ed25da872420508b7f1168b36b Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 7 Dec 2015 17:15:32 +0100 Subject: [PATCH 13/53] owrt: hack: fix mt7688 cache issue Signed-off-by: John Crispin --- arch/mips/kernel/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -652,8 +652,6 @@ static void __init arch_mem_init(char ** memblock_reserve(crashk_res.start, crashk_res.end - crashk_res.start + 1); #endif - device_tree_init(); - /* * In order to reduce the possibility of kernel panic when failed to * get IO TLB memory under CONFIG_SWIOTLB, it is better to allocate @@ -770,6 +768,7 @@ void __init setup_arch(char **cmdline_p) cpu_cache_init(); paging_init(); + device_tree_init(); } unsigned long kernelsp[NR_CPUS];