// SPDX-License-Identifier: GPL-2.0-or-later OR MIT #include "vr9.dtsi" #include #include / { compatible = "avm,fritz736x", "lantiq,xway", "lantiq,vr9"; chosen { bootargs = "console=ttyLTQ0,115200"; }; aliases { led-boot = &power_green; led-failsafe = &power_red; led-running = &power_green; led-upgrade = &power_red; led-dsl = &info_green; led-wifi = &wifi; }; memory@0 { device_type = "memory"; reg = <0x0 0x8000000>; }; keys { compatible = "gpio-keys-polled"; poll-interval = <100>; dect { label = "dect"; gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; linux,code = ; }; wifi { label = "wifi"; gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; linux,code = ; }; }; leds: leds { compatible = "gpio-leds"; power_green: power { gpios = <&gpio 32 GPIO_ACTIVE_LOW>; default-state = "keep"; }; power_red: power2 { gpios = <&gpio 33 GPIO_ACTIVE_LOW>; }; info_green: info_green { gpios = <&gpio 47 GPIO_ACTIVE_LOW>; }; wifi: wifi { gpios = <&gpio 36 GPIO_ACTIVE_LOW>; }; info_red: info_red { gpios = <&gpio 34 GPIO_ACTIVE_LOW>; }; dect: dect { gpios = <&gpio 35 GPIO_ACTIVE_LOW>; }; }; }; ð0 { lan: interface@0 { compatible = "lantiq,xrx200-pdi"; #address-cells = <1>; #size-cells = <0>; reg = <0>; mtd-mac-address = <&urlader 0xa91>; mtd-mac-address-increment = <(-2)>; lantiq,switch; ethernet@0 { compatible = "lantiq,xrx200-pdi-port"; reg = <0>; phy-mode = "rmii"; phy-handle = <&phy0>; }; ethernet@1 { compatible = "lantiq,xrx200-pdi-port"; reg = <1>; phy-mode = "rmii"; phy-handle = <&phy1>; }; ethernet@2 { compatible = "lantiq,xrx200-pdi-port"; reg = <2>; phy-mode = "gmii"; phy-handle = <&phy11>; }; ethernet@3 { compatible = "lantiq,xrx200-pdi-port"; reg = <4>; phy-mode = "gmii"; phy-handle = <&phy13>; }; }; mdio { #address-cells = <1>; #size-cells = <0>; compatible = "lantiq,xrx200-mdio"; phy0: ethernet-phy@0 { reg = <0x00>; compatible = "ethernet-phy-ieee802.3-c22"; reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>; }; phy1: ethernet-phy@1 { reg = <0x01>; compatible = "ethernet-phy-ieee802.3-c22"; reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; }; phy11: ethernet-phy@11 { reg = <0x11>; compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; }; phy13: ethernet-phy@13 { reg = <0x13>; compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; }; }; }; &gphy0 { lantiq,gphy-mode = ; }; &gphy1 { lantiq,gphy-mode = ; }; &gpio { pinctrl-names = "default"; pinctrl-0 = <&state_default>; state_default: pinmux { phy-rst { lantiq,pins = "io37", "io44"; lantiq,pull = <0>; lantiq,open-drain; lantiq,output = <1>; }; }; }; &pcie0 { status = "okay"; pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; #size-cells = <1>; #address-cells = <2>; device_type = "pci"; wifi@168c,002e { compatible = "pci168c,002e"; reg = <0 0 0 0 0>; qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */ }; }; }; &usb_phy0 { status = "okay"; }; &usb_phy1 { status = "okay"; }; &usb0 { status = "okay"; }; &usb1 { status = "okay"; };