// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /dts-v1/; #include #include #include "ar7100.dtsi" / { model = "jjPlus JA76PF2"; compatible = "jjplus,ja76pf2", "qca,ar7161"; memory@0 { device_type = "memory"; reg = <0x0 0x4000000>; }; chosen { bootargs = "console=ttyS0,115200n8"; }; aliases { led-boot = &d2; led-failsafe = &d2; led-running = &d2; led-upgrade = &d2; }; extosc: ref { compatible = "fixed-clock"; #clock-cells = <0>; clock-output-names = "ref"; clock-frequency = <40000000>; }; leds { compatible = "gpio-leds"; d2: d2 { label = "ja76pf2:green:d2"; gpios = <&gpio 5 GPIO_ACTIVE_LOW>; }; d3 { label = "ja76pf2:green:d3"; gpios = <&gpio 4 GPIO_ACTIVE_HIGH>; }; d4 { label = "ja76pf2:green:d4"; gpios = <&gpio 3 GPIO_ACTIVE_HIGH>; }; }; keys { compatible = "gpio-keys-polled"; poll-interval = <20>; sw1 { label = "sw1"; linux,code = ; gpios = <&gpio 7 GPIO_ACTIVE_LOW>; debounce-interval = <60>; }; sw2 { label = "sw2"; linux,code = ; gpios = <&gpio 8 GPIO_ACTIVE_LOW>; debounce-interval = <60>; }; }; }; &mdio0 { status = "okay"; phy-mask = <0x1>; phy0: ethernet-phy@0 { reg = <0>; phy-mode = "rgmii"; }; phy4: ethernet-phy@4 { reg = <4>; phy-mode = "rgmii"; }; }; ð0 { status = "okay"; phy-handle = <&phy0>; }; ð1 { status = "okay"; phy-handle = <&phy4>; }; &pcie0 { status = "okay"; }; &spi { status = "okay"; num-cs = <1>; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <25000000>; partitions { #address-cells = <1>; #size-cells = <1>; compatible = "ecoscentric,redboot-fis-partitions"; }; }; }; &uart { status = "okay"; };