// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /dts-v1/; #include "mt7620a.dtsi" #include #include / { compatible = "head-weblink,hdrm200", "ralink,mt7620a-soc"; model = "Head Weblink HDRM200"; aliases { led-boot = &led_system; led-failsafe = &led_system; led-running = &led_system; led-upgrade = &led_system; }; chosen { bootargs = "console=ttyS1,57600"; }; leds { compatible = "gpio-leds"; rssi { label = "hdrm200:red:rssi"; gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; }; led_system: system { label = "hdrm200:green:system"; gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; }; air { label = "hdrm200:green:wifi"; gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; }; }; keys { compatible = "gpio-keys"; wps { label = "wps"; gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; linux,code = ; }; reset { label = "reset"; gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; linux,code = ; }; }; }; &spi0 { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <10000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "u-boot"; reg = <0x0 0x30000>; read-only; }; partition@30000 { label = "u-boot-env"; reg = <0x30000 0x10000>; read-only; }; factory: partition@40000 { label = "factory"; reg = <0x40000 0x10000>; read-only; }; firmware: partition@50000 { compatible = "denx,uimage"; label = "firmware"; reg = <0x50000 0xfb0000>; }; }; }; }; &gpio0 { status = "okay"; }; &gpio1 { status = "okay"; }; &gpio3 { status = "okay"; }; &sdhci { status = "okay"; }; &ehci { status = "okay"; }; &ohci { status = "okay"; }; ðernet { pinctrl-names = "default"; pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>; mtd-mac-address = <&factory 0x4>; port@4 { status = "okay"; phy-handle = <&phy4>; phy-mode = "rgmii"; }; port@5 { status = "okay"; phy-handle = <&phy5>; phy-mode = "rgmii"; }; mdio-bus { status = "okay"; phy4: ethernet-phy@4 { reg = <4>; phy-mode = "rgmii"; }; phy5: ethernet-phy@5 { reg = <5>; phy-mode = "rgmii"; }; }; }; &wmac { ralink,mtd-eeprom = <&factory 0x0>; }; &state_default { default { groups = "i2c", "uartf", "pa", "spi refclk", "wled"; function = "gpio"; }; }; &pcie { status = "okay"; }; &pcie0 { wifi@0,0 { compatible = "mediatek,mt76"; reg = <0x0000 0 0 0 0>; mediatek,mtd-eeprom = <&factory 0x8000>; ieee80211-freq-limit = <5000000 6000000>; }; }; &uart { status = "okay"; };