/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 *
 * Copyright (c) 2018 Peng Zhang <sd20@qxwlan.com>
 *
 */

#include "qcom-ipq4019-e2600ac.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	model = "Qxwlan E2600AC c2";
	compatible = "qxwlan,e2600ac-c2";
};

&blsp1_spi1 {
	pinctrl-0 = <&spi_0_pins>;
	pinctrl-names = "default";
	status = "okay";
	cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;

	flash@0 {
		reg = <0>;
		compatible = "jedec,spi-nor";
		spi-max-frequency = <24000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "0:SBL1";
				reg = <0x0 0x40000>;
				read-only;
			};
			partition@40000 {
				label = "0:MIBIB";
				reg = <0x40000 0x20000>;
				read-only;
			};
			partition@60000 {
				label = "0:QSEE";
				reg = <0x60000 0x60000>;
				read-only;
			};
			partition@c0000 {
				label = "0:CDT";
				reg = <0xc0000 0x10000>;
				read-only;
			};
			partition@d0000 {
				label = "0:DDRPARAMS";
				reg = <0xd0000 0x10000>;
				read-only;
			};
			partition@e0000 {
				label = "0:APPSBLENV";
				reg = <0xe0000 0x10000>;
				read-only;
			};
			partition@f0000 {
				label = "0:APPSBL";
				reg = <0xf0000 0x80000>;
				read-only;
			};
			partition@170000 {
				label = "0:ART";
				reg = <0x170000 0x10000>;
				read-only;
			};
		};
	};
};

&nand {
	pinctrl-0 = <&nand_pins>;
	pinctrl-names = "default";
	status = "okay";

	nand@0 {
		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "ubi";
				reg = <0x00000000 0x04000000>;
			};
		};
	};
};

&tlmm {
	nand_pins: nand-pins {

		pullups {
			pins = "gpio53", "gpio58", "gpio59";
			function = "qpic";
			bias-pull-up;
		};

		pulldowns {
			pins = "gpio54", "gpio55", "gpio56",
				"gpio57", "gpio60", "gpio61",
				"gpio62", "gpio63", "gpio64",
				"gpio65", "gpio66", "gpio67",
				"gpio68", "gpio69";
			function = "qpic";
			bias-pull-down;
		};
	};
};