#include "qcom-ipq8064-v1.0.dtsi" / { model = "Qualcomm IPQ8064/DB149"; compatible = "qcom,ipq8064-db149", "qcom,ipq8064"; aliases { serial0 = &gsbi2_serial; }; reserved-memory { #address-cells = <1>; #size-cells = <1>; ranges; rsvd@41200000 { reg = <0x41200000 0x300000>; no-map; }; }; }; &qcom_pinmux { rgmii0_pins: rgmii0_pins { mux { pins = "gpio2", "gpio66"; drive-strength = <8>; bias-disable; }; }; }; &gsbi2 { qcom,mode = ; status = "okay"; gsbi2_serial: serial@12490000 { status = "okay"; }; }; &gsbi4 { status = "disabled"; }; &gsbi4_serial { status = "disabled"; }; &flash { m25p,fast-read; partition@0 { label = "lowlevel_init"; reg = <0x0 0x1b0000>; }; partition@1 { label = "u-boot"; reg = <0x1b0000 0x80000>; }; partition@2 { label = "u-boot-env"; reg = <0x230000 0x40000>; }; partition@3 { label = "caldata"; reg = <0x270000 0x40000>; }; partition@4 { label = "firmware"; reg = <0x2b0000 0x1d50000>; }; }; &usb3_0 { status = "okay"; }; &usb3_1 { status = "okay"; }; &pcie0 { status = "okay"; }; &pcie1 { status = "okay"; }; &pcie2 { status = "okay"; }; &mdio0 { status = "okay"; pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; phy0: ethernet-phy@0 { reg = <0>; qca,ar8327-initvals = < 0x00004 0x7600000 /* PAD0_MODE */ 0x00008 0x1000000 /* PAD5_MODE */ 0x0000c 0x80 /* PAD6_MODE */ 0x000e4 0x6a545 /* MAC_POWER_SEL */ 0x000e0 0xc74164de /* SGMII_CTRL */ 0x0007c 0x4e /* PORT0_STATUS */ 0x00094 0x4e /* PORT6_STATUS */ >; }; phy4: ethernet-phy@4 { reg = <4>; }; phy6: ethernet-phy@6 { reg = <6>; }; phy7: ethernet-phy@7 { reg = <7>; }; }; &gmac0 { status = "okay"; phy-mode = "rgmii"; qcom,id = <0>; phy-handle = <&phy4>; pinctrl-0 = <&rgmii0_pins>; pinctrl-names = "default"; }; &gmac1 { status = "okay"; phy-mode = "sgmii"; qcom,id = <1>; fixed-link { speed = <1000>; full-duplex; }; }; &gmac2 { status = "okay"; phy-mode = "sgmii"; qcom,id = <2>; phy-handle = <&phy6>; }; &gmac3 { status = "okay"; phy-mode = "sgmii"; qcom,id = <3>; phy-handle = <&phy7>; };