/dts-v1/; #include "mt7620a.dtsi" #include #include / { compatible = "dlink,dwr-118-a2", "ralink,mt7620a-soc"; model = "D-Link DWR-118 A2"; aliases { led-boot = &led_internet; led-failsafe = &led_internet; }; keys { compatible = "gpio-keys"; wps { label = "wps"; gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; linux,code = ; }; reset { label = "reset"; gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; linux,code = ; }; }; leds { compatible = "gpio-leds"; wan { label = "dwr-118-a2:green:wan"; gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; }; led_internet: internet { label = "dwr-118-a2:green:internet"; gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; }; lan { label = "dwr-118-a2:green:lan"; gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; }; wlan2g { label = "dwr-118-a2:green:wlan2g"; gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; }; usb { label = "dwr-118-a2:green:usb"; gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; trigger-sources = <&ohci_port1>, <&ehci_port1>; linux,default-trigger = "usbport"; }; }; gpio_export { compatible = "gpio-export"; #size-cells = <0>; usb { gpio-export,name = "usb"; gpio-export,output = <1>; gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; }; }; }; &gpio1 { status = "okay"; }; &gpio2 { status = "okay"; }; &gpio3 { status = "okay"; }; &spi0 { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <50000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "jboot"; reg = <0x0 0x10000>; read-only; }; partition@10000 { compatible = "amit,jimage"; label = "firmware"; reg = <0x10000 0xfe0000>; }; config: partition@ff0000 { label = "config"; reg = <0xff0000 0x10000>; read-only; }; }; }; }; &ehci { status = "okay"; }; &ohci { status = "okay"; }; &state_default { default { groups = "ephy", "uartf", "spi refclk", "wled"; function = "gpio"; }; }; &pcie { status = "okay"; }; &pcie0 { wifi@0,0 { reg = <0x0000 0 0 0 0>; ieee80211-freq-limit = <5000000 6000000>; mtd-mac-address = <&config 0xe4a8>; mtd-mac-address-increment = <(2)>; led { led-sources = <2>; led-active-low; }; }; }; ðernet { pinctrl-names = "default"; pinctrl-0 = <&rgmii1_pins &mdio_pins>; mediatek,portmap = "wllll"; port@4 { status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii"; }; mdio-bus { status = "okay"; phy0: ethernet-phy@0 { reg = <0>; phy-mode = "rgmii-rxid"; }; }; }; &gsw { mediatek,port4 = "gmac"; mediatek,ephy-base-address = /bits/ 16 < 2 >; };