From 3dc3a4c6ac9e8a0940a9974b8fe2da7641bfa3dd Mon Sep 17 00:00:00 2001 From: Alex Marginean Date: Thu, 22 Aug 2019 12:47:12 +0300 Subject: [PATCH] arm64: dts: LS1028a-rdb: use Ethernet PHY interrupt Use the PHY interrupt wired to GPIO pins as part of MDIO WA performance impact mitigation. Signed-off-by: Alex Marginean --- arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts @@ -202,6 +202,8 @@ #size-cells = <0>; sgmii_phy0: ethernet-phy@2 { reg = <0x2>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; }; }; }; @@ -213,18 +215,26 @@ &enetc_mdio_pf3 { qsgmii_phy1: ethernet-phy@4 { reg = <0x10>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; }; qsgmii_phy2: ethernet-phy@5 { reg = <0x11>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; }; qsgmii_phy3: ethernet-phy@6 { reg = <0x12>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; }; qsgmii_phy4: ethernet-phy@7 { reg = <0x13>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; }; };