The ag71xx driver from Linux 5.4 currently has various shortcomings
when used with OpenWrt compared to our downstream version.
For example, the upstream driver does not support modifying the ethernet
clock and configuring RGMII delays on the MAC side.
While we should certainly switch to the upstream driver, the amount of
necessary patches would make it cumbersome to work with. It's also
highly likely we won't be able to finish patching the upstream driver in
time for a Linux 5.4 release.
Tested on Siemens WS-AP3610.
CC: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: David Bauer <mail@david-bauer.net>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: David Bauer <mail@david-bauer.net>
[refreshed]
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* Sync the patches with the changes done for kernel 4.19
* Use KERNEL_TESTING_PATCHVER
* Refresh the configuration
* Fix multiple compile bugs in the patches
* Only add own ag71xx files for kernel 4.19 and use upstream version for
5.4.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This new function make batch processing of network packets possible,
which slightly improves performance.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Tested-by: Rosen Penev <rosenp@gmail.com>
This commit adds a workaround for the loss of the SGMII link observed on
the QCA955x generation of SoCs. The workaround originates part from the
U-Boot source code, part from the implementation from AVM found in the
GPL tarball for the AVM FRITZ!WLAN Repeater 450E.
The bug results in a stuck SGMII link between the PHY device and the SoC
side. This has only been observed with the Atheros AR8033 PHY and most
likely all devices using such combination are affected.
It is worked around by reading a hidden SGMII status register and
issuing a SGMII PHY reset until the link becomes useable again.
Signed-off-by: David Bauer <mail@david-bauer.net>
tx_size was just declared above and set to BIT(tx->order)
Use the declaration instead, which could avoid a pointer deref
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
All other instances of this identical declaration fetch the
value directly from the ring_order.
Also do it here.
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Upstream commit 246902bdf562d45ea3475fac64c93048a7a39f01
Which contains following explanation:
--
There is no need to use GFP_ATOMIC here, GFP_KERNEL should be enough.
The 'kcalloc()' just a few lines above, already uses GFP_KERNEL.
--
Looking at the code, all other descriptors also use plain GFP_KERNEL
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
The ag71xx code did not include a case for the "rgmii-id" PHY mode in the
code. There are devices that need this mode, so I'm adding it.
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
gmac0 may need a phy on builtin switch, which can be unavailable
if gmac0 is probed before builtin switch.
Return -EPROBE_DEFER in this case so that gmac0 can be probed
later.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
ethtool doesn't work currently as phy_ethtool_ioctl expects user space
pointer, but it's being passed kernel one. Fixing it doesn't make sense
as {s,g}et_settings were deprecated anyway. So let's rather remove
phy_ethtool_ioctl and use new {s,g}et_link_ksettings instead. While at
it, update nway_reset as well.
Cc: John Crispin <john@phrozen.org>
Ref: https://bugs.openwrt.org/index.php?do=details&task_id=1982
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This ioctl is currently routed through generic interface code:
dev_ioctl
dev_ethtool
__ethtool_get_link_ksettings
phy_ethtool_ioctl
Cc: John Crispin <john@phrozen.org>
Cc: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
In ar71xx we check for stuck DMA on devices which fall in the is_ar724x
SoC group (ar724x, ar933x, ar934x, qca9533, tp9343, qca955x, qca956x).
In ath79 we're currently performing this check only for devices with
ar7240 SoC, so this patch tries to sync the dma stuck checking behavior
with what is being done in ar71xx.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
linux 4.19 doesn't accept a NULL device for these functions.
It also complains that the device struct in net_device doesn't have
a dma_mask set.
Pass the device struct from platform_device for these functions.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Kernel newer than 4.15 dropped "data" field and used from_timer
to cast out the parent struct pointer for current timer.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
It is unused by default and upstream is trying to remove it as it has
negative effects when the driver is under load. Upstream explanation:
netpoll: avoid capture effects for NAPI drivers
As diagnosed by Song Liu, ndo_poll_controller() can
be very dangerous on loaded hosts, since the cpu
calling ndo_poll_controller() might steal all NAPI
contexts (for all RX/TX queues of the NIC).
This capture, showing one ksoftirqd eating all cycles
can last for unlimited amount of time, since one
cpu is generally not able to drain all the queues under load.
It seems that all networking drivers that do use NAPI
for their TX completions, should not provide a ndo_poll_controller() :
Most NAPI drivers have netpoll support already handled
in core networking stack, since netpoll_poll_dev(
uses poll_napi(dev) to iterate through registered
NAPI contexts for a device.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
While converting Nanostation M XW from current ar71xx code to ath79 I've
hit one issue, where the ethernet networking wasn't working, so I was
checking every bit in the networking setup path between ar71xx and
ath79.
I've came to the following code in ar71xx/mach-ubnt-xm.c:
static void __init ubnt_xw_init(void) {
...
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_MII_GMAC0 |
AR934X_ETH_CFG_MII_GMAC0_SLAVE);
...
}
Where this code is setting AR934X_ETH_CFG_MII_GMAC0_SLAVE bit in
AR934X_GMAC_REG_ETH_CFG register, but I couldn't find a way of setting
this bit from DTS, so this patch adds `mii-gmac0-slave` DTS property
which allows setting of this bit in `gmac-config`, which is then used in
Nanostation M XW DTS.
Tested-by: Joe Ayers <ae6xe@arrl.net>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
On ar933x and later chips, there are separated mac/mdio resets, but
resetting the entire gmac block with register values requires both
mac_reset and mdio_reset to be asserted together.
Add support for optional mdio reset so that we can do a full reset
if needed.
This patch also replaced deprecated devm_reset_control_get for
mac reset.
To use this feature, the following is needed:
1. drop "simple-mfd" compatible to register mdio0 after gmac init
so that mdio registers aren't reset after initialization.
2. move mdio reset from mdio-bus to its parent eth node.
NOTE: This can't be applied on gmac1 with builtin switch since we
haven't add a feature to defer probe if phy connection failed.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
remove the hacky checking of "simple-mfd" compatible
also add some comments explaining that piece of code.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
using the devm api makes the code simpler.
also drop unneeded memory free from ag71xx_remove since they are
allocated using devm apis.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
phy_modes() in phy.h can convert PHY modes to string with supports
for all available PHY modes.
Also add a space in mode printing to make it look better.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
On ath79 and UBNT Bullet M XW (ar9342) I was experiencing weird issues during
network setup[1] which I was able to reproduce easily with following commands:
uci set network.lan.ipaddr='192.168.1.20'
uci commit network
ifup lan
Which resulted after some time in:
...
WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:461 dev_watchdog+0x16c/0x280
NETDEV WATCHDOG: eth0 (ag71xx): transmit queue 0 timed out
...
Sometimes I wasn't able to use networking anymore, sometimes it was enough to
just ifdown/ifup lan and network was backup. On ar71xx it was all working just
fine.
I've found out, that it was happening because ag71xx_poll() wasn't called, thus
the TX queue wasn't emptied. The ag71xx_poll() is being called from napi
hrtimer, which is enabled by napi_schedule() in ar71xx_interrupt(), but since
no interrupts were ever fired again after ag71xx_stop() was called, it was
always leading to tx queue timeouts:
*** ag71xx_hard_start_xmit()
eth0: packet injected into TX queue
eth0: raw intr=00000001 TXPS POLL
eth0: enable polling mode
eth0: processing TX ring, flush=no
eth0: disable polling mode, rx=1, tx=1,limit=32
( `ifup lan done here` )
*** ag71xx_stop()
*** ag71xx_open()
*** ag71xx_hw_enable()
IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
*** ag71xx_hard_start_xmit()
eth0: packet injected into TX queue
*** ag71xx_hard_start_xmit()
eth0: packet injected into TX queue
...
WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:320 dev_watchdog+0x164/0x274
So I've looked at ag71xx_stop() in ar71xx, added the missing bits to ath79 and
fixed this issue.
1. https://github.com/openwrt/openwrt/pull/1635#issuecomment-448638246
Signed-off-by: Petr Štetiar <ynezz@true.cz>
[move ag->link before ag71xx_hw_disable to retain ordering as original]
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
The swconfig load operation always triggers 'apply' function which in
this driver currently clears port mirroring flags effectively undoing
port mirroring configuration.
Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
Currently it's quite hard to diff debugging output between ar71xx and
ath79, so this patch tries to improve it by adding the same
ag71xx_dump_regs function and placing debugging output from the
registers to relatively same places.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Without "syscon" being present in an ag71xx ethernet DT node's
compatible property, a panic occurs at boot during probe citing
"Unhandled kernel unaligned access".
With this modification, the panic no longer occurs and instead the probe
simply fails, allowing the boot process to continue.
Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
We currently don't have any code configuring interface mode in ath79,
meaning that we relies on bootloader to set the correct interface mode.
This patch added code to set interface correctly so that everything works
even if bootloader configures it wrong.(e.g. on WNDR3800 u-boot set
the second GMAC mode to RMII but it should be RGMII.)
Introduced "qca,mac-idx" for the difference in MII_CTRL register value.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Bit 8/12 of reset controller which is marked as PHY_RESET/SWITCH_RESET
in datasheets will trigger either a reset for builtin switch or assert
an external ETH0_RESET_L/ETH1_RESET_L pin, which are usually connected
to external PHY/switch. None of them should be triggered every time an
interface is brought up in ethernet driver.
Remove PHY reset support from ag71xx and definition for them in dtsi.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
mdio bus isn't a standalone device on ar7240. (and maybe older SoCs?)
Use simple-mfd for ar7241 and later SoCs to get mdio1 ready before gmac0
For ar7240 and older chips, manually create platform device after
ag71xx_hw_init() in ag71xx_probe()to get mdio0 ready between
ag71xx_hw_init() and ag71xx_phy_connect().
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Allow specifying desired mdio clock frequency in dts.
Use default frequency around 5MHz for builtin switch and 2MHz for other mdio bus.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This patch did several things:
1. Probe the builtin switch as a separated mdio device.
2. Register a separated mdio bus for builtin switch.
3. Use generic mdio read/write function instead of calling ag71xx_mdio_mii_read/write directly.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
We need to have mdio1 belonging to gmac1 initialized before gmac0.
Split it into a separated mdio device to get both mdios ready before probing gmac.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The builtin switch has it's initial valid mac address(00:00:01:00:00:00).
Since the builtin switch is an independent device, setting mac address of gmac1 to builtin switch isn't a good idea and this makes it impossilbe to split builtin switch apart as an independent platform device.
Remove these functions and apply default VLAN during initialization as a preparation for further driver splitting.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
ar71xx/ar913x series use the old pll registers and settings.
However started from ar7242, a new pll register is introduced and the
pll setting is much simpler.
This can be observed from dev-eth.c from the ar71xx target.
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
1. compatible property in node gmac was wrong
2. ag71xx_setup_gmac_933x should use np of gmac-config and
not the pointer to gmac. gmac is only used for the reg address.
Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
This target aims to replace ar71xx mid-term. The big part that is still
missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
subtargets will follow.
Signed-off-by: John Crispin <john@phrozen.org>
David Bauer
Chuanhong Guo
Koen Vandeputte
Daniel Gimpelevich
Petr Štetiar
Rosen Penev
Milan Krstic
Matt Merhar
Christian Lamparter
Lucian Cristian
Weijie Gao
John Crispin
Johann Neuhauser