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@ -80,12 +80,17 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
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config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
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spin_unlock_irqrestore(&rt2880_pci_lock, flags);
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if (size == 1)
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switch (size) {
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case 1:
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*val = (data >> ((where & 3) << 3)) & 0xff;
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else if (size == 2)
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break;
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case 2:
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*val = (data >> ((where & 3) << 3)) & 0xffff;
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else
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break;
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case 4:
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*val = data;
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break;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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@ -97,16 +102,21 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
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u32 data = 0;
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spin_lock_irqsave(&rt2880_pci_lock, flags);
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if (size == 4) {
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data = val;
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} else {
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switch (size) {
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case 1:
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config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
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data = (data & ~(0xff << ((where & 3) << 3))) |
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(val << ((where & 3) << 3));
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break;
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case 2:
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config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
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if (size == 1)
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data = (data & ~(0xff << ((where & 3) << 3))) |
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(val << ((where & 3) << 3));
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else if (size == 2)
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data = (data & ~(0xffff << ((where & 3) << 3))) |
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(val << ((where & 3) << 3));
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data = (data & ~(0xffff << ((where & 3) << 3))) |
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(val << ((where & 3) << 3));
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break;
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case 4:
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data = val;
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break;
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}
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config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data);
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