kernel: bump 4.14 to 4.14.178
Refreshed all patches and removed upstreamed: oxnas/001-irqchip-versatile-fpga-Handle-chained-IRQs-properly.patch oxnas/002-irqchip-versatile-fpga-Apply-clear-mask-earlier.patch Fixes: CVE-2020-12114 and CVE-2020-11669 Runtime-tested on: qemu-x86-64 Compile-tested on: ath79/generic, x86/64, imx6 Signed-off-by: Petr Štetiar <ynezz@true.cz>v19.07.3_mercusys_ac12_duma
Petr Štetiar
4 years ago
parent
2df0ea042d
commit
f9ef0c5705
@ -1,77 +0,0 @@
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From patchwork Thu Mar 19 02:34:48 2020
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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X-Patchwork-Submitter: Sungbo Eo <mans0n@gorani.run>
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X-Patchwork-Id: 11446405
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From: Sungbo Eo <mans0n@gorani.run>
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To: Linus Walleij <linus.walleij@linaro.org>,
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Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>,
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Marc Zyngier <maz@kernel.org>, linux-arm-kernel@lists.infradead.org,
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linux-kernel@vger.kernel.org, linux-oxnas@groups.io
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Subject: [PATCH v2] irqchip/versatile-fpga: Handle chained IRQs properly
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Date: Thu, 19 Mar 2020 11:34:48 +0900
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Message-Id: <20200319023448.1479701-1-mans0n@gorani.run>
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In-Reply-To: <002b72cab9896fa5ac76a52e0cb503ff@kernel.org>
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References: <002b72cab9896fa5ac76a52e0cb503ff@kernel.org>
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MIME-Version: 1.0
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List-Id: <linux-arm-kernel.lists.infradead.org>
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Cc: Sungbo Eo <mans0n@gorani.run>, Neil Armstrong <narmstrong@baylibre.com>
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Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org>
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Enclose the chained handler with chained_irq_{enter,exit}(), so that the
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muxed interrupts get properly acked.
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This patch also fixes a reboot bug on OX820 SoC, where the jiffies timer
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interrupt is never acked. The kernel waits a clock tick forever in
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calibrate_delay_converge(), which leads to a boot hang.
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Fixes: c41b16f8c9d9 ("ARM: integrator/versatile: consolidate FPGA IRQ handling code")
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Signed-off-by: Sungbo Eo <mans0n@gorani.run>
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Cc: Neil Armstrong <narmstrong@baylibre.com>
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---
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v2: moved readl below chained_irq_enter()
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added Fixes tag
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drivers/irqchip/irq-versatile-fpga.c | 12 ++++++++++--
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1 file changed, 10 insertions(+), 2 deletions(-)
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--- a/drivers/irqchip/irq-versatile-fpga.c
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+++ b/drivers/irqchip/irq-versatile-fpga.c
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@@ -6,6 +6,7 @@
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/irqchip.h>
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+#include <linux/irqchip/chained_irq.h>
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#include <linux/irqchip/versatile-fpga.h>
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#include <linux/irqdomain.h>
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#include <linux/module.h>
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@@ -68,12 +69,16 @@ static void fpga_irq_unmask(struct irq_d
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static void fpga_irq_handle(struct irq_desc *desc)
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{
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+ struct irq_chip *chip = irq_desc_get_chip(desc);
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struct fpga_irq_data *f = irq_desc_get_handler_data(desc);
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- u32 status = readl(f->base + IRQ_STATUS);
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+ u32 status;
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+ chained_irq_enter(chip, desc);
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+
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+ status = readl(f->base + IRQ_STATUS);
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if (status == 0) {
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do_bad_IRQ(desc);
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- return;
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+ goto out;
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}
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do {
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@@ -82,6 +87,9 @@ static void fpga_irq_handle(struct irq_d
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status &= ~(1 << irq);
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generic_handle_irq(irq_find_mapping(f->domain, irq));
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} while (status);
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+
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+out:
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+ chained_irq_exit(chip, desc);
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}
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/*
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@ -1,56 +0,0 @@
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From patchwork Sat Mar 21 13:38:42 2020
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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X-Patchwork-Submitter: Sungbo Eo <mans0n@gorani.run>
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X-Patchwork-Id: 11451163
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From: Sungbo Eo <mans0n@gorani.run>
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To: linux-oxnas@groups.io, Linus Walleij <linus.walleij@linaro.org>,
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Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>,
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Marc Zyngier <maz@kernel.org>, linux-arm-kernel@lists.infradead.org,
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linux-kernel@vger.kernel.org
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Subject: [PATCH] irqchip/versatile-fpga: Apply clear-mask earlier
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Date: Sat, 21 Mar 2020 22:38:42 +0900
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Message-Id: <20200321133842.2408823-1-mans0n@gorani.run>
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MIME-Version: 1.0
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Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org>
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Clear its own IRQs before the parent IRQ get enabled, so that the
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remaining IRQs do not accidentally interrupt the parent IRQ controller.
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This patch also fixes a reboot bug on OX820 SoC, where the remaining
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rps-timer IRQ raises a GIC interrupt that is left pending. After that,
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the rps-timer IRQ is cleared during driver initialization, and there's
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no IRQ left in rps-irq when local_irq_enable() is called, which evokes
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an error message "unexpected IRQ trap".
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Fixes: bdd272cbb97a ("irqchip: versatile FPGA: support cascaded interrupts from DT")
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Signed-off-by: Sungbo Eo <mans0n@gorani.run>
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Cc: Neil Armstrong <narmstrong@baylibre.com>
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Cc: Daniel Golle <daniel@makrotopia.org>
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---
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drivers/irqchip/irq-versatile-fpga.c | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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--- a/drivers/irqchip/irq-versatile-fpga.c
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+++ b/drivers/irqchip/irq-versatile-fpga.c
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@@ -212,6 +212,9 @@ int __init fpga_irq_of_init(struct devic
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if (of_property_read_u32(node, "valid-mask", &valid_mask))
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valid_mask = 0;
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+ writel(clear_mask, base + IRQ_ENABLE_CLEAR);
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+ writel(clear_mask, base + FIQ_ENABLE_CLEAR);
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+
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/* Some chips are cascaded from a parent IRQ */
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parent_irq = irq_of_parse_and_map(node, 0);
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if (!parent_irq) {
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@@ -221,9 +224,6 @@ int __init fpga_irq_of_init(struct devic
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fpga_irq_init(base, node->name, 0, parent_irq, valid_mask, node);
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- writel(clear_mask, base + IRQ_ENABLE_CLEAR);
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- writel(clear_mask, base + FIQ_ENABLE_CLEAR);
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-
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/*
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* On Versatile AB/PB, some secondary interrupts have a direct
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* pass-thru to the primary controller for IRQs 20 and 22-31 which need
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