kernel: update 3.10 to 3.10.32
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 39707v19.07.3_mercusys_ac12_duma
Gabor Juhos
10 years ago
parent
6c8300df3d
commit
f677b1bc7e
@ -1,26 +0,0 @@
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From e85583b12b023773b488cf8406f11719a4037461 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jogo@openwrt.org>
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Date: Sun, 1 Dec 2013 16:16:44 +0100
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Subject: [PATCH 1/2] spi/bcm63xx: don't substract prepend length from total
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length
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The spi command must include the full message length including any
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prepended writes, else transfers larger than 256 bytes will be
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incomplete.
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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drivers/spi/spi-bcm63xx.c | 2 --
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1 file changed, 2 deletions(-)
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--- a/drivers/spi/spi-bcm63xx.c
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+++ b/drivers/spi/spi-bcm63xx.c
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@@ -180,8 +180,6 @@ static int bcm63xx_txrx_bufs(struct spi_
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transfer_list);
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}
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- len -= prepend_len;
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-
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init_completion(&bs->done);
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/* Fill in the Message control register */
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@ -1,46 +0,0 @@
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From 60b78d28057f9f1ecce39955755d26e4cd3130de Mon Sep 17 00:00:00 2001
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From: Lior Amsalem <alior@marvell.com>
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Date: Mon, 25 Nov 2013 17:26:44 +0100
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Subject: [PATCH 085/203] irqchip: armada-370-xp: fix IPI race condition
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In the Armada 370/XP driver, when we receive an IRQ 0, we read the
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list of doorbells that caused the interrupt from register
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ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS. This gives the list of IPIs that
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were generated. However, instead of acknowledging only the IPIs that
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were generated, we acknowledge *all* the IPIs, by writing
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~IPI_DOORBELL_MASK in the ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS register.
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This creates a race condition: if a new IPI that isn't part of the
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ones read into the temporary "ipimask" variable is fired before we
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acknowledge all IPIs, then we will simply loose it. This is causing
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scheduling hangs on SMP intensive workloads.
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It is important to mention that this ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS
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register has the following behavior: "A CPU write of 0 clears the bits
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in this field. A CPU write of 1 has no effect". This is what allows us
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to simply write ~ipimask to acknoledge the handled IPIs.
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Notice that the same problem is present in the MSI implementation, but
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it will be fixed as a separate patch, so that this IPI fix can be
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pushed to older stable versions as appropriate (all the way to 3.8),
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while the MSI code only appeared in 3.13.
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Signed-off-by: Lior Amsalem <alior@marvell.com>
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Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Cc: stable@vger.kernel.org
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Cc: Thomas Gleixner <tglx@linutronix.de>
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---
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drivers/irqchip/irq-armada-370-xp.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/irqchip/irq-armada-370-xp.c
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+++ b/drivers/irqchip/irq-armada-370-xp.c
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@@ -407,7 +407,7 @@ armada_370_xp_handle_irq(struct pt_regs
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ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS)
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& IPI_DOORBELL_MASK;
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- writel(~IPI_DOORBELL_MASK, per_cpu_int_base +
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+ writel(~ipimask, per_cpu_int_base +
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ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS);
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/* Handle all pending doorbells */
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@ -1,58 +0,0 @@
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From d587c866f34aa8e59ddc3628969113e725e36eab Mon Sep 17 00:00:00 2001
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From: Lior Amsalem <alior@marvell.com>
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Date: Mon, 23 Dec 2013 13:07:35 +0100
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Subject: [PATCH 196/203] ata: sata_mv: setting PHY speed according to SControl
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speed
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This patch fixes a SATA hotplug issue on the Armada 370 and Armada XP
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SoCs. Without it, if a disk is unplugged from a SATA port, then further
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hotplug notification are now longer received on this port.
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This should be applied to every -stable kernel supporting Armada SoCs.
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Signed-off-by: Lior Amsalem <alior@marvell.com>
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Signed-off-by: Nadav Haklai <nadavh@marvell.com>
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Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
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Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Cc: Jason Cooper <jason@lakedaemon.net>
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Cc: Andrew Lunn <andrew@lunn.ch>
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Cc: Gregory Clement <gregory.clement@free-electrons.com>
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Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Cc: stable@vger.kernel.org
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---
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drivers/ata/sata_mv.c | 10 ++++++++++
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1 file changed, 10 insertions(+)
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--- a/drivers/ata/sata_mv.c
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+++ b/drivers/ata/sata_mv.c
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@@ -304,6 +304,7 @@ enum {
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MV5_LTMODE = 0x30,
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MV5_PHY_CTL = 0x0C,
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SATA_IFCFG = 0x050,
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+ LP_PHY_CTL = 0x058,
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MV_M2_PREAMP_MASK = 0x7e0,
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@@ -1353,6 +1354,7 @@ static int mv_scr_write(struct ata_link
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if (ofs != 0xffffffffU) {
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void __iomem *addr = mv_ap_base(link->ap) + ofs;
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+ void __iomem *lp_phy_addr = mv_ap_base(link->ap) + LP_PHY_CTL;
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if (sc_reg_in == SCR_CONTROL) {
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/*
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* Workaround for 88SX60x1 FEr SATA#26:
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@@ -1369,6 +1371,14 @@ static int mv_scr_write(struct ata_link
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*/
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if ((val & 0xf) == 1 || (readl(addr) & 0xf) == 1)
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val |= 0xf000;
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+
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+ /*
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+ * Setting PHY speed according to SControl speed
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+ */
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+ if ((val & 0xf0) == 0x10)
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+ writelfl(0x7, lp_phy_addr);
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+ else
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+ writelfl(0x227, lp_phy_addr);
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}
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writelfl(val, addr);
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return 0;
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