ar71xx: add kernel support for BHU Networks BXU2000n-2 A1 board
BXU2000n-2 A1 is a BHU Networks WLAN board, use ar9341 chip. Patchwork: http://patchwork.openwrt.org/patch/4183/ Signed-off-by: Terry Yang <yangbo@bhunetworks.com> [juhosg: - rename and refresh kernel patch, - fix some checkpatch warnings and adjust whitespaces in mach-bhu-bxu2000n2-a.c] Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 38591v19.07.3_mercusys_ac12_duma
Gabor Juhos
11 years ago
parent
acd4ea62e7
commit
ef8306cfd2
@ -0,0 +1,120 @@
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/*
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* BHU BXU2000n-2 A1 board support
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*
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* Copyright (C) 2013 Terry Yang <yangbo@bhunetworks.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#define BHU_BXU2000N2_A1_GPIO_LED_WLAN 13
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#define BHU_BXU2000N2_A1_GPIO_LED_WAN 19
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#define BHU_BXU2000N2_A1_GPIO_LED_LAN 21
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#define BHU_BXU2000N2_A1_GPIO_LED_SYSTEM 14
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#define BHU_BXU2000N2_A1_GPIO_BTN_RESET 17
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#define BHU_BXU2000N2_KEYS_POLL_INTERVAL 20 /* msecs */
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#define BHU_BXU2000N2_KEYS_DEBOUNCE_INTERVAL \
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(3 * BHU_BXU2000N2_KEYS_POLL_INTERVAL)
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static const char *bhu_bxu2000n2_part_probes[] = {
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"cmdlinepart",
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NULL,
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};
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static struct flash_platform_data bhu_bxu2000n2_flash_data = {
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.part_probes = bhu_bxu2000n2_part_probes,
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};
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static struct gpio_led bhu_bxu2000n2_a1_leds_gpio[] __initdata = {
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{
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.name = "bhu:green:status",
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.gpio = BHU_BXU2000N2_A1_GPIO_LED_SYSTEM,
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.active_low = 1,
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}, {
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.name = "bhu:green:lan",
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.gpio = BHU_BXU2000N2_A1_GPIO_LED_LAN,
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.active_low = 1,
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}, {
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.name = "bhu:green:wan",
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.gpio = BHU_BXU2000N2_A1_GPIO_LED_WAN,
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.active_low = 1,
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}, {
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.name = "bhu:green:wlan",
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.gpio = BHU_BXU2000N2_A1_GPIO_LED_WLAN,
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.active_low = 1,
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},
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};
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static struct gpio_keys_button bhu_bxu2000n2_a1_gpio_keys[] __initdata = {
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{
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.desc = "Reset button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = BHU_BXU2000N2_KEYS_DEBOUNCE_INTERVAL,
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.gpio = BHU_BXU2000N2_A1_GPIO_BTN_RESET,
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.active_low = 1,
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}
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};
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static void __init bhu_ap123_setup(void)
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{
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u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
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u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
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ath79_register_m25p80(&bhu_bxu2000n2_flash_data);
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ath79_register_mdio(1, 0x0);
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ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
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ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
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/* GMAC0 is connected to the PHY4 of the internal switch */
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ath79_switch_data.phy4_mii_en = 1;
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ath79_switch_data.phy_poll_mask = BIT(4);
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
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ath79_eth0_data.phy_mask = BIT(4);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
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ath79_register_eth(0);
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/* GMAC1 is connected to the internal switch. Only use PHY3 */
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
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ath79_eth1_data.phy_mask = BIT(3);
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ath79_register_eth(1);
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ath79_register_wmac(ee, ee+2);
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}
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static void __init bhu_bxu2000n2_a1_setup(void)
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{
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bhu_ap123_setup();
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ath79_register_leds_gpio(-1, ARRAY_SIZE(bhu_bxu2000n2_a1_leds_gpio),
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bhu_bxu2000n2_a1_leds_gpio);
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ath79_register_gpio_keys_polled(1, BHU_BXU2000N2_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(bhu_bxu2000n2_a1_gpio_keys),
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bhu_bxu2000n2_a1_gpio_keys);
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}
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MIPS_MACHINE(ATH79_MACH_BHU_BXU2000N2_A1, "BXU2000n-2-A1",
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"BHU BXU2000n-2 rev. A1",
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bhu_bxu2000n2_a1_setup);
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@ -0,0 +1,39 @@
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--- a/arch/mips/ath79/Kconfig
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+++ b/arch/mips/ath79/Kconfig
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@@ -826,6 +826,16 @@ config ATH79_MACH_CARAMBOLA2
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select ATH79_DEV_USB
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select ATH79_DEV_WMAC
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+config ATH79_MACH_BHU_BXU2000N2_A
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+ bool "BHU BXU2000n-2 rev. A support"
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+ select SOC_AR934X
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+ select ATH79_DEV_ETH
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+ select ATH79_DEV_GPIO_BUTTONS
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+ select ATH79_DEV_LEDS_GPIO
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+ select ATH79_DEV_M25P80
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+ select ATH79_DEV_USB
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+ select ATH79_DEV_WMAC
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+
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endmenu
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config SOC_AR71XX
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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@@ -51,6 +51,7 @@ obj-$(CONFIG_ATH79_MACH_AP83) += mach-a
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obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o
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obj-$(CONFIG_ATH79_MACH_ARCHER_C7) += mach-archer-c7.o
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obj-$(CONFIG_ATH79_MACH_AW_NR580) += mach-aw-nr580.o
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+obj-$(CONFIG_ATH79_MACH_BHU_BXU2000N2_A)+= mach-bhu-bxu2000n2-a.o
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obj-$(CONFIG_ATH79_MACH_CAP4200AG) += mach-cap4200ag.o
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obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
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obj-$(CONFIG_ATH79_MACH_DIR_505_A1) += mach-dir-505-a1.o
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--- a/arch/mips/ath79/machtypes.h
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+++ b/arch/mips/ath79/machtypes.h
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@@ -33,6 +33,7 @@ enum ath79_mach_type {
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ATH79_MACH_AP96, /* Atheros AP96 */
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ATH79_MACH_ARCHER_C7, /* TP-LINK Archer C7 board */
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ATH79_MACH_AW_NR580, /* AzureWave AW-NR580 */
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+ ATH79_MACH_BHU_BXU2000N2_A1, /* BHU BXU2000n-2 A1 */
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ATH79_MACH_CAP4200AG, /* Senao CAP4200AG */
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ATH79_MACH_CARAMBOLA2, /* 8devices Carambola2 */
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ATH79_MACH_DB120, /* Atheros DB120 reference board */
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