ramips: fold gic patch into mt7621 support patch
All gic patch was doing is removing code added by mt7621 support patch. Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com> SVN-Revision: 47839v19.07.3_mercusys_ac12_duma
John Crispin
9 years ago
parent
ed8775d3c3
commit
e4ee2402cb
@ -1,305 +0,0 @@
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From 7b042645c1bd6407b1f7d9aa5785868e7e14b860 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Mon, 7 Dec 2015 18:40:16 +0100
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Subject: [PATCH 53/53] gic
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---
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arch/mips/ralink/Kconfig | 1 +
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arch/mips/ralink/Makefile | 2 +-
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arch/mips/ralink/irq-gic.c | 212 ++------------------------------------------
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3 files changed, 11 insertions(+), 204 deletions(-)
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--- a/arch/mips/ralink/Kconfig
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+++ b/arch/mips/ralink/Kconfig
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@@ -51,9 +51,9 @@
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select SYS_SUPPORTS_MULTITHREADING
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select SYS_SUPPORTS_SMP
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select SYS_SUPPORTS_MIPS_CMP
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+ select MIPS_GIC
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select IRQ_GIC
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select HW_HAS_PCI
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-
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endchoice
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choice
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--- a/arch/mips/ralink/Makefile
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+++ b/arch/mips/ralink/Makefile
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@@ -13,7 +13,7 @@
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obj-$(CONFIG_RALINK_ILL_ACC) += ill_acc.o
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obj-$(CONFIG_IRQ_INTC) += irq.o
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-obj-$(CONFIG_IRQ_GIC) += irq-gic.o
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+obj-$(CONFIG_MIPS_GIC_IPI) += irq-gic.o
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obj-$(CONFIG_MIPS_MT_SMP) += malta-amon.o
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obj-$(CONFIG_SOC_RT288X) += rt288x.o
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--- a/arch/mips/ralink/irq-gic.c
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+++ b/arch/mips/ralink/irq-gic.c
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@@ -16,248 +16,22 @@
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#include <asm/irq.h>
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#include <asm/setup.h>
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-#include <asm/gic.h>
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+#include <asm/mips-cm.h>
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+#include <linux/irqchip/mips-gic.h>
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#include <asm/mach-ralink/mt7621.h>
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-#define GIC_BASE_ADDR 0x1fbc0000
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-unsigned long _gcmp_base;
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-static int gic_resched_int_base = 56;
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-static int gic_call_int_base = 60;
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-static struct irq_chip *irq_gic;
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-static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS];
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-
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-#if defined(CONFIG_MIPS_MT_SMP)
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-static int gic_resched_int_base;
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-static int gic_call_int_base;
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+extern int __init gic_of_init(struct device_node *node,
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+ struct device_node *parent);
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-#define GIC_RESCHED_INT(cpu) (gic_resched_int_base+(cpu))
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-#define GIC_CALL_INT(cpu) (gic_call_int_base+(cpu))
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-
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-static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
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-{
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- scheduler_ipi();
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-
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- return IRQ_HANDLED;
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-}
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-
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-static irqreturn_t
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-ipi_call_interrupt(int irq, void *dev_id)
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-{
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- smp_call_function_interrupt();
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-
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- return IRQ_HANDLED;
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-}
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-
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-static struct irqaction irq_resched = {
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- .handler = ipi_resched_interrupt,
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- .flags = IRQF_DISABLED|IRQF_PERCPU,
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- .name = "ipi resched"
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-};
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-
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-static struct irqaction irq_call = {
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- .handler = ipi_call_interrupt,
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- .flags = IRQF_DISABLED|IRQF_PERCPU,
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- .name = "ipi call"
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-};
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-
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-#endif
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-
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-static void __init
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-gic_fill_map(void)
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-{
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- int i;
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-
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- for (i = 0; i < ARRAY_SIZE(gic_intr_map); i++) {
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- gic_intr_map[i].cpunum = 0;
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- gic_intr_map[i].pin = GIC_CPU_INT0;
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- gic_intr_map[i].polarity = GIC_POL_POS;
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- gic_intr_map[i].trigtype = GIC_TRIG_LEVEL;
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- gic_intr_map[i].flags = 0;
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- }
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-
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-#if defined(CONFIG_MIPS_MT_SMP)
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- {
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- int cpu;
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-
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- gic_call_int_base = ARRAY_SIZE(gic_intr_map) - nr_cpu_ids;
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- gic_resched_int_base = gic_call_int_base - nr_cpu_ids;
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-
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- i = gic_resched_int_base;
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-
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- for (cpu = 0; cpu < nr_cpu_ids; cpu++) {
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- gic_intr_map[i + cpu].cpunum = cpu;
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- gic_intr_map[i + cpu].pin = GIC_CPU_INT1;
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- gic_intr_map[i + cpu].trigtype = GIC_TRIG_EDGE;
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-
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- gic_intr_map[i + cpu + nr_cpu_ids].cpunum = cpu;
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- gic_intr_map[i + cpu + nr_cpu_ids].pin = GIC_CPU_INT2;
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- gic_intr_map[i + cpu + nr_cpu_ids].trigtype = GIC_TRIG_EDGE;
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- }
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- }
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-#endif
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-}
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-
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-void
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-gic_irq_ack(struct irq_data *d)
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-{
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- int irq = (d->irq - gic_irq_base);
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-
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- GIC_CLR_INTR_MASK(irq);
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-
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- if (gic_irq_flags[irq] & GIC_TRIG_EDGE)
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- GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq);
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-}
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-
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-void
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-gic_finish_irq(struct irq_data *d)
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-{
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- GIC_SET_INTR_MASK(d->irq - gic_irq_base);
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-}
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-
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-void __init
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-gic_platform_init(int irqs, struct irq_chip *irq_controller)
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-{
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- irq_gic = irq_controller;
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-}
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-
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-static void
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-gic_irqdispatch(void)
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-{
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- unsigned int irq = gic_get_int();
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-
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- if (likely(irq < GIC_NUM_INTRS))
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- do_IRQ(MIPS_GIC_IRQ_BASE + irq);
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- else {
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- pr_debug("Spurious GIC Interrupt!\n");
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- spurious_interrupt();
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- }
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-
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-}
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-
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-static void
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-vi_timer_irqdispatch(void)
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-{
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- do_IRQ(cp0_compare_irq);
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-}
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-
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-#if defined(CONFIG_MIPS_MT_SMP)
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-unsigned int
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-plat_ipi_call_int_xlate(unsigned int cpu)
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-{
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- return GIC_CALL_INT(cpu);
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-}
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-
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-unsigned int
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-plat_ipi_resched_int_xlate(unsigned int cpu)
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-{
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- return GIC_RESCHED_INT(cpu);
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-}
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-#endif
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-
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-asmlinkage void
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-plat_irq_dispatch(void)
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-{
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- unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
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-
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- if (unlikely(!pending)) {
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- pr_err("Spurious CP0 Interrupt!\n");
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- spurious_interrupt();
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- } else {
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- if (pending & CAUSEF_IP7)
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- do_IRQ(cp0_compare_irq);
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-
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- if (pending & (CAUSEF_IP4 | CAUSEF_IP3 | CAUSEF_IP2))
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- gic_irqdispatch();
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- }
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-}
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-
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-unsigned int __cpuinit
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-get_c0_compare_int(void)
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-{
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- return CP0_LEGACY_COMPARE_IRQ;
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-}
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-
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-static int
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-gic_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
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-{
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- irq_set_chip_and_handler(irq, irq_gic,
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-#if defined(CONFIG_MIPS_MT_SMP)
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- (hw >= gic_resched_int_base) ?
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- handle_percpu_irq :
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-#endif
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- handle_level_irq);
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-
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- return 0;
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-}
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-
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-static const struct irq_domain_ops irq_domain_ops = {
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- .xlate = irq_domain_xlate_onecell,
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- .map = gic_map,
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-};
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-
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-static int __init
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-of_gic_init(struct device_node *node,
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- struct device_node *parent)
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+unsigned int get_c0_compare_int(void)
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{
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- struct irq_domain *domain;
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- struct resource gcmp = { 0 }, gic = { 0 };
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- unsigned int gic_rev;
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- int i;
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-
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- if (of_address_to_resource(node, 0, &gic))
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- panic("Failed to get gic memory range");
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- if (request_mem_region(gic.start, resource_size(&gic),
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- gic.name) < 0)
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- panic("Failed to request gic memory");
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- if (of_address_to_resource(node, 2, &gcmp))
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- panic("Failed to get gic memory range");
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- if (request_mem_region(gcmp.start, resource_size(&gcmp),
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- gcmp.name) < 0)
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- panic("Failed to request gcmp memory");
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-
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- _gcmp_base = (unsigned long) ioremap_nocache(gcmp.start, resource_size(&gcmp));
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- if (!_gcmp_base)
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- panic("Failed to remap gcmp memory\n");
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-
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- /* tell the gcmp where to find the gic */
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- write_gcr_gic_base(GIC_BASE_ADDR | CM_GCR_GIC_BASE_GICEN_MSK);
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- gic_present = 1;
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- if (cpu_has_vint) {
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- set_vi_handler(2, gic_irqdispatch);
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- set_vi_handler(3, gic_irqdispatch);
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- set_vi_handler(4, gic_irqdispatch);
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- set_vi_handler(7, vi_timer_irqdispatch);
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- }
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-
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- gic_fill_map();
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-
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- gic_init(gic.start, resource_size(&gic), gic_intr_map,
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- ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE);
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-
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- GICREAD(GIC_REG(SHARED, GIC_SH_REVISIONID), gic_rev);
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- pr_info("gic: revision %d.%d\n", (gic_rev >> 8) & 0xff, gic_rev & 0xff);
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-
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- domain = irq_domain_add_legacy(node, GIC_NUM_INTRS, MIPS_GIC_IRQ_BASE,
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- 0, &irq_domain_ops, NULL);
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- if (!domain)
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- panic("Failed to add irqdomain");
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-
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-#if defined(CONFIG_MIPS_MT_SMP)
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- for (i = 0; i < nr_cpu_ids; i++) {
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- setup_irq(MIPS_GIC_IRQ_BASE + GIC_RESCHED_INT(i), &irq_resched);
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- setup_irq(MIPS_GIC_IRQ_BASE + GIC_CALL_INT(i), &irq_call);
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- }
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-#endif
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-
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- change_c0_status(ST0_IM, STATUSF_IP7 | STATUSF_IP4 | STATUSF_IP3 |
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- STATUSF_IP2);
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- return 0;
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+ return gic_get_c0_compare_int();
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}
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static struct of_device_id __initdata of_irq_ids[] = {
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- { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_intc_init },
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- { .compatible = "ralink,mt7621-gic", .data = of_gic_init },
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+ { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init },
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+ { .compatible = "mti,gic", .data = gic_of_init },
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{},
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};
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--- a/drivers/irqchip/irq-mips-gic.c
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+++ b/drivers/irqchip/irq-mips-gic.c
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@@ -864,7 +864,7 @@
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__gic_init(gic_base_addr, gic_addrspace_size, cpu_vec, irqbase, NULL);
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}
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-static int __init gic_of_init(struct device_node *node,
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+int __init gic_of_init(struct device_node *node,
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struct device_node *parent)
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{
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struct resource res;
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