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@ -26,6 +26,40 @@ void __iomem * rt305x_sysc_base;
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void __iomem * rt305x_memc_base;
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enum rt305x_soc_type rt305x_soc;
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static unsigned long rt5350_get_mem_size(void)
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{
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void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
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unsigned long ret;
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u32 t;
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t = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG);
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t = (t >> RT5350_SYSCFG0_DRAM_SIZE_SHIFT) &
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RT5350_SYSCFG0_DRAM_SIZE_MASK;
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switch (t) {
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case RT5350_SYSCFG0_DRAM_SIZE_2M:
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ret = 2 * 1024 * 1024;
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break;
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case RT5350_SYSCFG0_DRAM_SIZE_8M:
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ret = 8 * 1024 * 1024;
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break;
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case RT5350_SYSCFG0_DRAM_SIZE_16M:
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ret = 16 * 1024 * 1024;
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break;
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case RT5350_SYSCFG0_DRAM_SIZE_32M:
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ret = 32 * 1024 * 1024;
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break;
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case RT5350_SYSCFG0_DRAM_SIZE_64M:
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ret = 64 * 1024 * 1024;
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break;
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default:
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panic("rt5350: invalid DRAM size: %u", t);
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break;
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}
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return ret;
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}
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void __init ramips_soc_prom_init(void)
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{
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void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
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@ -71,7 +105,9 @@ void __init ramips_soc_prom_init(void)
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ramips_mem_base = RT305X_SDRAM_BASE;
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if (soc_is_rt305x() || soc_is_rt3350() || soc_is_rt5350()) {
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if (soc_is_rt5350()) {
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ramips_get_mem_size = rt5350_get_mem_size;
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} else if (soc_is_rt305x() || soc_is_rt3350() ) {
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ramips_mem_size_min = RT305X_MEM_SIZE_MIN;
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ramips_mem_size_max = RT305X_MEM_SIZE_MAX;
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} else if (soc_is_rt3352()) {
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