kernel: bump 4.19 to 4.19.85
Refreshed all patches. Altered patches: - 080-sata_support.patch Remove upstreamed: - 034-v4.20-MIPS-BCM47XX-Enable-USB-power-on-Netgear-WNDR3400v3.patch - 001-4.21-01-BCM63XX-fix-switch-core-reset-on-BCM6368.patch - 073-qcom-ipq4019-fix-cpu0-s-qcom-saw2-reg-value.patch Compile-tested on: cns3xxx Runtime-tested on: cns3xxx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>master
Koen Vandeputte
4 years ago
parent
db9e9e8382
commit
e29500eb84
@ -1,48 +0,0 @@
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From feef7918667b84f9d5653c501542dd8d84ae32af Mon Sep 17 00:00:00 2001
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From: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
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Date: Sun, 19 Aug 2018 22:20:23 +0300
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Subject: [PATCH] MIPS: BCM47XX: Enable USB power on Netgear WNDR3400v3
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Setting GPIO 21 high seems to be required to enable power to USB ports
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on the WNDR3400v3. As there is already similar code for WNR3500L,
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make the existing USB power GPIO code generic and use that.
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Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
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Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
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Signed-off-by: Paul Burton <paul.burton@mips.com>
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Patchwork: https://patchwork.linux-mips.org/patch/20259/
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Cc: Rafał Miłecki <zajec5@gmail.com>
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Cc: linux-mips@linux-mips.org
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Cc: linux-kernel@vger.kernel.org
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---
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arch/mips/bcm47xx/workarounds.c | 8 +++++---
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1 file changed, 5 insertions(+), 3 deletions(-)
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--- a/arch/mips/bcm47xx/workarounds.c
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+++ b/arch/mips/bcm47xx/workarounds.c
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@@ -5,9 +5,8 @@
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#include <bcm47xx_board.h>
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#include <bcm47xx.h>
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-static void __init bcm47xx_workarounds_netgear_wnr3500l(void)
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+static void __init bcm47xx_workarounds_enable_usb_power(int usb_power)
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{
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- const int usb_power = 12;
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int err;
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err = gpio_request_one(usb_power, GPIOF_OUT_INIT_HIGH, "usb_power");
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@@ -23,7 +22,10 @@ void __init bcm47xx_workarounds(void)
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switch (board) {
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case BCM47XX_BOARD_NETGEAR_WNR3500L:
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- bcm47xx_workarounds_netgear_wnr3500l();
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+ bcm47xx_workarounds_enable_usb_power(12);
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+ break;
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+ case BCM47XX_BOARD_NETGEAR_WNDR3400_V3:
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+ bcm47xx_workarounds_enable_usb_power(21);
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break;
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default:
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/* No workaround(s) needed */
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@ -1,26 +0,0 @@
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From f1af8bb8e0879a3c2d9679a7274c2774335e9876 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Wed, 14 Nov 2018 12:06:41 +0100
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Subject: [PATCH] MIPS: BCM63XX: fix switch core reset on BCM6368
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The Ethernet Switch core mask was set to 0, causing the switch core to
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be not reset on BCM6368 on boot. Provide the proper mask so the switch
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core gets reset to a known good state.
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Fixes: 799faa626c71 ("MIPS: BCM63XX: add core reset helper")
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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---
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arch/mips/bcm63xx/reset.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/arch/mips/bcm63xx/reset.c
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+++ b/arch/mips/bcm63xx/reset.c
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@@ -120,7 +120,7 @@
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#define BCM6368_RESET_DSL 0
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#define BCM6368_RESET_SAR SOFTRESET_6368_SAR_MASK
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#define BCM6368_RESET_EPHY SOFTRESET_6368_EPHY_MASK
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-#define BCM6368_RESET_ENETSW 0
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+#define BCM6368_RESET_ENETSW SOFTRESET_6368_ENETSW_MASK
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#define BCM6368_RESET_PCM SOFTRESET_6368_PCM_MASK
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#define BCM6368_RESET_MPI SOFTRESET_6368_MPI_MASK
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#define BCM6368_RESET_PCIE 0
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@ -1,34 +0,0 @@
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From bd73a3dd257fb838bd456a18eeee0ef0224b7a40 Mon Sep 17 00:00:00 2001
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From: Christian Lamparter <chunkeey@gmail.com>
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Date: Wed, 25 Jul 2018 10:37:47 +0200
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Subject: [PATCH] ARM: dts: qcom: ipq4019: fix cpu0's qcom,saw2 reg value
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while compiling an ipq4019 target, dtc will complain:
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regulator@b089000 unit address format error, expected "2089000"
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The saw0 regulator reg value seems to be
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copied and pasted from qcom-ipq8064.dtsi.
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This patch fixes the reg value to match that of the
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unit address which in turn silences the warning.
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(There is no driver for qcom,saw2 right now.
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So this went unnoticed)
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Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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Signed-off-by: John Crispin <john@phrozen.org>
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Signed-off-by: Andy Gross <andy.gross@linaro.org>
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---
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arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -325,7 +325,7 @@
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saw0: regulator@b089000 {
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compatible = "qcom,saw2";
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- reg = <0x02089000 0x1000>, <0x0b009000 0x1000>;
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+ reg = <0x0b089000 0x1000>, <0x0b009000 0x1000>;
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regulator;
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};
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