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switch: remove old switch driver

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The switch driver is not used by brcm47xx any more and can be removed,
instead of this switch driver b53 is used now.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

SVN-Revision: 38387
v19.07.3_mercusys_ac12_duma
Hauke Mehrtens 11 years ago
parent dd3f451d55
commit e1523b5504
10 changed files with 1 additions and 2850 deletions
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59
package/kernel/switch/Makefile
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#
# Copyright (C) 2006-2012 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=kmod-switch
PKG_RELEASE:=6
include $(INCLUDE_DIR)/package.mk
define KernelPackage/switch
SUBMENU:=Other modules
DEPENDS:=@TARGET_brcm47xx @!LINUX_3_10
TITLE:=Switch drivers
FILES:= \
$(PKG_BUILD_DIR)/switch-core.ko \
$(PKG_BUILD_DIR)/switch-adm.ko \
$(PKG_BUILD_DIR)/switch-robo.ko
AUTOLOAD:=$(call AutoLoad,20,switch-core switch-robo switch-adm,1)
endef
define KernelPackage/switch/description
This package contains switch drivers for ADM6996L and BCM53XX RoboSwitch.
endef
define Build/Prepare
mkdir -p $(PKG_BUILD_DIR)
$(CP) ./src/* $(PKG_BUILD_DIR)/
endef
define Build/Compile
$(MAKE) -C "$(LINUX_DIR)" \
CROSS_COMPILE="$(TARGET_CROSS)" \
ARCH="$(LINUX_KARCH)" \
SUBDIRS="$(PKG_BUILD_DIR)" \
EXTRA_CFLAGS="$(BUILDFLAGS)" \
modules
endef
define Build/InstallDev
mkdir -p $(1)/usr/include
$(CP) ./src/switch-core.h $(1)/usr/include/
endef
define Build/UninstallDev
rm -f $(1)/usr/include/switch-core.h
endef
define KernelPackage/switch/install
$(INSTALL_DIR) $(1)/lib/network/
$(INSTALL_BIN) ./files/switch.sh $(1)/lib/network/
endef
$(eval $(call KernelPackage,switch))

53
package/kernel/switch/files/switch.sh
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#!/bin/sh
# Copyright (C) 2006-2010 OpenWrt.org
setup_switch_hw() {
local dev="$1"
local enable reset evlan
config_get_bool enable "$dev" enable 1
config_get_bool evlan "$dev" enable_vlan 1
config_get_bool reset "$dev" reset 1
local proc="/proc/switch/$dev"
[ -d "$proc" ] && {
ifconfig "$dev" up
echo "$reset" > "$proc/reset"
echo "$evlan" > "$proc/enable_vlan"
[ -f "$proc/enable" ] && echo "$enable" > "$proc/enable"
}
local vlan
for vlan in `seq 0 15`; do
proc="/proc/switch/$dev/vlan/$vlan/ports"
[ -f "$proc" ] && echo "" > "$proc"
done
}
setup_switch_vlan() {
local s="$1"
local dev vlan ports
config_get dev "$s" device
config_get vlan "$s" vlan
config_get ports "$s" ports
[ -n "$dev" ] && [ -n "$vlan" ] && {
ports="${ports%\*}"
[ "$_vlan_pvid_set" = 1 ] || {
ports="$ports*"
_vlan_pvid_set=1
}
local proc="/proc/switch/$dev/vlan/$vlan/ports"
[ -f "$proc" ] && echo "$ports" > "$proc"
}
}
setup_switch() {
_vlan_pvid_set=0
config_load network
config_foreach setup_switch_hw switch
config_foreach setup_switch_vlan switch_vlan
}

18
package/kernel/switch/src/Makefile
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#
# Makefile for switch driver
#
# Copyright (C) 2005 Felix Fietkau <nbd@openwrt.org>
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version
# 2 of the License, or (at your option) any later version.
#
obj-m := switch-core.o switch-adm.o switch-robo.o
ifeq ($(MAKING_MODULES),1)
export-objs := switch-core.o
-include $(TOPDIR)/Rules.make
endif

624
package/kernel/switch/src/etc53xx.h
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/*
* Broadcom Home Gateway Reference Design
* BCM53xx Register definitions
*
* Copyright 2004, Broadcom Corporation
* All Rights Reserved.
*
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
*/
#ifndef __BCM535M_H_
#define __BCM535M_H_
/* ROBO embedded device type */
#define ROBO_DEV_5380 1
#define ROBO_DEV_5365 2
#define ROBO_DEV_5350 3
#define ROBO_DEV_53115 4
/* BCM5325m GLOBAL PAGE REGISTER MAP */
#ifndef _CFE_
#pragma pack(1)
#endif
/* BCM5325m Serial Management Port (SMP) Page offsets */
#define ROBO_CTRL_PAGE 0x00 /* Control registers */
#define ROBO_STAT_PAGE 0x01 /* Status register */
#define ROBO_MGMT_PAGE 0x02 /* Management Mode registers */
#define ROBO_MIB_AC_PAGE 0x03 /* MIB Autocast registers */
#define ROBO_ARLCTRL_PAGE 0x04 /* ARL Control Registers */
#define ROBO_ARLIO_PAGE 0x05 /* ARL Access Registers */
#define ROBO_FRAMEBUF_PAGE 0x06 /* Management frame access registers */
#define ROBO_MEM_ACCESS_PAGE 0x08 /* Memory access registers */
/* PHY Registers */
#define ROBO_PORT0_MII_PAGE 0x10 /* Port 0 MII Registers */
#define ROBO_PORT1_MII_PAGE 0x11 /* Port 1 MII Registers */
#define ROBO_PORT2_MII_PAGE 0x12 /* Port 2 MII Registers */
#define ROBO_PORT3_MII_PAGE 0x13 /* Port 3 MII Registers */
#define ROBO_PORT4_MII_PAGE 0x14 /* Port 4 MII Registers */
/* (start) registers only for BCM5380 */
#define ROBO_PORT5_MII_PAGE 0x15 /* Port 5 MII Registers */
#define ROBO_PORT6_MII_PAGE 0x16 /* Port 6 MII Registers */
#define ROBO_PORT7_MII_PAGE 0x17 /* Port 7 MII Registers */
/* (end) registers only for BCM5380 */
#define ROBO_IM_PORT_PAGE 0x18 /* Inverse MII Port (to EMAC) */
#define ROBO_ALL_PORT_PAGE 0x19 /* All ports MII Registers (broadcast)*/
/* MAC Statistics registers */
#define ROBO_PORT0_MIB_PAGE 0x20 /* Port 0 10/100 MIB Statistics */
#define ROBO_PORT1_MIB_PAGE 0x21 /* Port 1 10/100 MIB Statistics */
#define ROBO_PORT2_MIB_PAGE 0x22 /* Port 2 10/100 MIB Statistics */
#define ROBO_PORT3_MIB_PAGE 0x23 /* Port 3 10/100 MIB Statistics */
#define ROBO_PORT4_MIB_PAGE 0x24 /* Port 4 10/100 MIB Statistics */
/* (start) registers only for BCM5380 */
#define ROBO_PORT5_MIB_PAGE 0x25 /* Port 5 10/100 MIB Statistics */
#define ROBO_PORT6_MIB_PAGE 0x26 /* Port 6 10/100 MIB Statistics */
#define ROBO_PORT7_MIB_PAGE 0x27 /* Port 7 10/100 MIB Statistics */
/* (end) registers only for BCM5380 */
#define ROBO_IM_PORT_MIB_PAGE 0x28 /* Inverse MII Port MIB Statistics */
/* Quality of Service (QoS) Registers */
#define ROBO_QOS_PAGE 0x30 /* QoS Registers */
/* VLAN Registers */
#define ROBO_VLAN_PAGE 0x34 /* VLAN Registers */
/* Note SPI Data/IO Registers not used */
#define ROBO_SPI_DATA_IO_0_PAGE 0xf0 /* SPI Data I/O 0 */
#define ROBO_SPI_DATA_IO_1_PAGE 0xf1 /* SPI Data I/O 1 */
#define ROBO_SPI_DATA_IO_2_PAGE 0xf2 /* SPI Data I/O 2 */
#define ROBO_SPI_DATA_IO_3_PAGE 0xf3 /* SPI Data I/O 3 */
#define ROBO_SPI_DATA_IO_4_PAGE 0xf4 /* SPI Data I/O 4 */
#define ROBO_SPI_DATA_IO_5_PAGE 0xf5 /* SPI Data I/O 5 */
#define ROBO_SPI_DATA_IO_6_PAGE 0xf6 /* SPI Data I/O 6 */
#define ROBO_SPI_DATA_IO_7_PAGE 0xf7 /* SPI Data I/O 7 */
#define ROBO_SPI_STATUS_PAGE 0xfe /* SPI Status Registers */
#define ROBO_PAGE_PAGE 0xff /* Page Registers */
/* BCM5325m CONTROL PAGE (0x00) REGISTER MAP : 8bit (byte) registers */
typedef struct _ROBO_PORT_CTRL_STRUC
{
unsigned char rx_disable:1; /* rx disable */
unsigned char tx_disable:1; /* tx disable */
unsigned char rsvd:3; /* reserved */
unsigned char stp_state:3; /* spanning tree state */
} ROBO_PORT_CTRL_STRUC;
#define ROBO_PORT0_CTRL 0x00 /* 10/100 Port 0 Control */
#define ROBO_PORT1_CTRL 0x01 /* 10/100 Port 1 Control */
#define ROBO_PORT2_CTRL 0x02 /* 10/100 Port 2 Control */
#define ROBO_PORT3_CTRL 0x03 /* 10/100 Port 3 Control */
#define ROBO_PORT4_CTRL 0x04 /* 10/100 Port 4 Control */
/* (start) registers only for BCM5380 */
#define ROBO_PORT5_CTRL 0x05 /* 10/100 Port 5 Control */
#define ROBO_PORT6_CTRL 0x06 /* 10/100 Port 6 Control */
#define ROBO_PORT7_CTRL 0x07 /* 10/100 Port 7 Control */
/* (end) registers only for BCM5380 */
#define ROBO_IM_PORT_CTRL 0x08 /* 10/100 Port 8 Control */
#define ROBO_SMP_CTRL 0x0a /* SMP Control register */
#define ROBO_SWITCH_MODE 0x0b /* Switch Mode Control */
#define ROBO_PORT_OVERRIDE_CTRL 0x0e /* Port state override */
#define ROBO_PORT_OVERRIDE_RVMII (1<<4) /* Bit 4 enables RvMII */
#define ROBO_PD_MODE_CTRL 0x0f /* Power-down mode control */
#define ROBO_IP_MULTICAST_CTRL 0x21 /* IP Multicast control */
/* BCM5325m STATUS PAGE (0x01) REGISTER MAP : 16bit/48bit registers */
#define ROBO_HALF_DUPLEX 0
#define ROBO_FULL_DUPLEX 1
#define ROBO_LINK_STAT_SUMMARY 0x00 /* Link Status Summary: 16bit */
#define ROBO_LINK_STAT_CHANGE 0x02 /* Link Status Change: 16bit */
#define ROBO_SPEED_STAT_SUMMARY 0x04 /* Port Speed Summary: 16bit*/
#define ROBO_DUPLEX_STAT_SUMMARY 0x06 /* Duplex Status Summary: 16bit */
#define ROBO_PAUSE_STAT_SUMMARY 0x08 /* PAUSE Status Summary: 16bit */
#define ROBO_SOURCE_ADDR_CHANGE 0x0C /* Source Address Change: 16bit */
#define ROBO_LSA_PORT0 0x10 /* Last Source Addr, Port 0: 48bits*/
#define ROBO_LSA_PORT1 0x16 /* Last Source Addr, Port 1: 48bits*/
#define ROBO_LSA_PORT2 0x1c /* Last Source Addr, Port 2: 48bits*/
#define ROBO_LSA_PORT3 0x22 /* Last Source Addr, Port 3: 48bits*/
#define ROBO_LSA_PORT4 0x28 /* Last Source Addr, Port 4: 48bits*/
#define ROBO_LSA_IM_PORT 0x40 /* Last Source Addr, IM Port: 48bits*/
/* BCM5325m MANAGEMENT MODE REGISTERS (0x02) REGISTER MAP: 8/48 bit regs*/
typedef struct _ROBO_GLOBAL_CONFIG_STRUC
{
unsigned char resetMIB:1; /* reset MIB counters */
unsigned char rxBPDU:1; /* receive BDPU enable */
unsigned char rsvd1:2; /* reserved */
unsigned char MIBacHdrCtrl:1; /* MIB autocast header control */
unsigned char MIBac:1; /* MIB autocast enable */
unsigned char frameMgmtPort:2; /* frame management port */
} ROBO_GLOBAL_CONFIG_STRUC;
#define ROBO_GLOBAL_CONFIG 0x00 /* Global Management Config: 8bit*/
#define ROBO_MGMT_PORT_ID 0x02 /* Management Port ID: 8bit*/
#define ROBO_RMON_MIB_STEER 0x04 /* RMON Mib Steering: 16bit */
#define ROBO_MIB_MODE_SELECT 0x04 /* MIB Mode select: 16bit (BCM5350) */
#define ROBO_AGE_TIMER_CTRL 0x06 /* Age time control: 32bit */
#define ROBO_MIRROR_CAP_CTRL 0x10 /* Mirror Capture : 16bit */
#define ROBO_MIRROR_ING_CTRL 0x12 /* Mirror Ingress Control: 16bit */
#define ROBO_MIRROR_ING_DIV_CTRL 0x14 /* Mirror Ingress Divider: 16bit */
#define ROBO_MIRROR_ING_MAC_ADDR 0x16 /* Ingress Mirror MAC Addr: 48bit*/
#define ROBO_MIRROR_EGR_CTRL 0x1c /* Mirror Egress Control: 16bit */
#define ROBO_MIRROR_EGR_DIV_CTRL 0x1e /* Mirror Egress Divider: 16bit */
#define ROBO_MIRROR_EGR_MAC_ADDR 0x20 /* Egress Mirror MAC Addr: 48bit*/
/* BCM5325m MIB AUTOCAST REGISTERS (0x03) REGISTER MAP: 8/16/48 bit regs */
#define ROBO_MIB_AC_PORT 0x00 /* MIB Autocast Port: 16bit */
#define ROBO_MIB_AC_HDR_PTR 0x02 /* MIB Autocast Header pointer:16bit*/
#define ROBO_MIB_AC_HDR_LEN 0x04 /* MIB Autocast Header Len: 16bit */
#define ROBO_MIB_AC_DA 0x06 /* MIB Autocast DA: 48bit */
#define ROBO_MIB_AC_SA 0x0c /* MIB Autocast SA: 48bit */
#define ROBO_MIB_AC_TYPE 0x12 /* MIB Autocast Type: 16bit */
#define ROBO_MIB_AC_RATE 0x14 /* MIB Autocast Rate: 8bit */
#define ROBO_GET_AC_RATE(secs) ((secs)*10)
#define ROBO_AC_RATE_MAX 0xff
#define ROBO_AC_RATE_DEFAULT 0x64 /* 10 secs */
typedef struct _ROBO_MIB_AC_STRUCT
{
unsigned char opcode:4; /* Tx MIB Autocast opcode */
unsigned char portno:4; /* zero-based port no. */
unsigned char portstate:8; /* port state */
unsigned long long TxOctets;
unsigned int TxDropPkts;
unsigned int rsvd;
unsigned int TxBroadcastPkts;
unsigned int TxMulticastPkts;
unsigned int TxUnicastPkts;
unsigned int TxCollisions;
unsigned int TxSingleCollision;
unsigned int TxMultiCollision;
unsigned int TxDeferredTransmit;
unsigned int TxLateCollision;
unsigned int TxExcessiveCollision;
unsigned int TxFrameInDiscards;
unsigned int TxPausePkts;
unsigned int rsvd1[2];
unsigned long long RxOctets;
unsigned int RxUndersizePkts;
unsigned int RxPausePkts;
unsigned int RxPkts64Octets;
unsigned int RxPkts64to127Octets;
unsigned int RxPkts128to255Octets;
unsigned int RxPkts256to511Octets;
unsigned int RxPkts512to1023Octets;
unsigned int RxPkts1024to1522Octets;
unsigned int RxOversizePkts;
unsigned int RxJabbers;
unsigned int RxAlignmentErrors;
unsigned int RxFCSErrors;
unsigned long long RxGoodOctets;
unsigned int RxDropPkts;
unsigned int RxUnicastPkts;
unsigned int RxMulticastPkts;
unsigned int RxBroadcastPkts;
unsigned int RxSAChanges;
unsigned int RxFragments;
unsigned int RxExcessSizeDisc;
unsigned int RxSymbolError;
} ROBO_MIB_AC_STRUCT;
/* BCM5325m ARL CONTROL REGISTERS (0x04) REGISTER MAP: 8/16/48/64 bit regs */
#define ROBO_ARL_CONFIG 0x00 /* ARL Global Configuration: 8bit*/
#define ROBO_BPDU_MC_ADDR_REG 0x04 /* BPDU Multicast Address Reg:64bit*/
#define ROBO_MULTIPORT_ADDR_1 0x10 /* Multiport Address 1: 48 bits*/
#define ROBO_MULTIPORT_VECTOR_1 0x16 /* Multiport Vector 1: 16 bits */
#define ROBO_MULTIPORT_ADDR_2 0x20 /* Multiport Address 2: 48 bits*/
#define ROBO_MULTIPORT_VECTOR_2 0x26 /* Multiport Vector 2: 16 bits */
#define ROBO_SECURE_SRC_PORT_MASK 0x30 /* Secure Source Port Mask: 16 bits*/
#define ROBO_SECURE_DST_PORT_MASK 0x32 /* Secure Dest Port Mask: 16 bits */
/* BCM5325m ARL IO REGISTERS (0x05) REGISTER MAP: 8/16/48/64 bit regs */
#define ARL_TABLE_WRITE 0 /* for read/write state in control reg */
#define ARL_TABLE_READ 1 /* for read/write state in control reg */
#ifdef BCM5380
#define ARL_VID_BYTES 2 /* number of bytes for VID */
#else
#define ARL_VID_BYTES 1 /* number of bytes for VID */
#endif
typedef struct _ROBO_ARL_RW_CTRL_STRUC
{
unsigned char ARLrw:1; /* ARL read/write (1=read) */
unsigned char rsvd:6; /* reserved */
unsigned char ARLStart:1; /* ARL start/done (1=start) */
} ROBO_ARL_RW_CTRL_STRUC;
typedef struct _ROBO_ARL_SEARCH_CTRL_STRUC
{
unsigned char valid:1; /* ARL search result valid */
unsigned char rsvd:6; /* reserved */
unsigned char ARLStart:1; /* ARL start/done (1=start) */
} ROBO_ARL_SEARCH_CTRL_STRUC;
typedef struct _ROBO_ARL_ENTRY_CTRL_STRUC
{
unsigned char portID:4; /* port id */
unsigned char chipID:2; /* chip id */
unsigned char rsvd:5; /* reserved */
unsigned char prio:2; /* priority */
unsigned char age:1; /* age */
unsigned char staticEn:1; /* static */
unsigned char valid:1; /* valid */
} ROBO_ARL_ENTRY_CTRL_STRUC;
typedef struct _ROBO_ARL_SEARCH_RESULT_CTRL_STRUC
{
unsigned char portID:4; /* port id */
unsigned char rsvd:1; /* reserved */
unsigned char vid:8; /* vlan id */
unsigned char age:1; /* age */
unsigned char staticEn:1; /* static */
unsigned char valid:1; /* valid */
} ROBO_ARL_SEARCH_RESULT_CTRL_STRUC;
typedef struct _ROBO_ARL_ENTRY_MAC_STRUC
{
unsigned char macBytes[6]; /* MAC address */
} ROBO_ARL_ENTRY_MAC_STRUC;
typedef struct _ROBO_ARL_ENTRY_STRUC
{
ROBO_ARL_ENTRY_MAC_STRUC mac; /* MAC address */
ROBO_ARL_ENTRY_CTRL_STRUC ctrl; /* control bits */
} ROBO_ARL_ENTRY_STRUC;
typedef struct _ROBO_ARL_SEARCH_RESULT_STRUC
{
ROBO_ARL_ENTRY_MAC_STRUC mac; /* MAC address */
ROBO_ARL_SEARCH_RESULT_CTRL_STRUC ctrl; /* control bits */
} ROBO_ARL_SEARCH_RESULT_STRUC;
/* multicast versions of ARL entry structs */
typedef struct _ROBO_ARL_ENTRY_MCAST_CTRL_STRUC
{
unsigned int portMask:12;/* multicast port mask */
unsigned char prio:1; /* priority */
unsigned char gigPort:1; /* gigabit port 1 mask */
unsigned char staticEn:1; /* static */
unsigned char valid:1; /* valid */
} ROBO_ARL_ENTRY_MCAST_CTRL_STRUC;
typedef struct _ROBO_ARL_SEARCH_RESULT_MCAST_CTRL_STRUC
{
unsigned int portMask:13; /* multicast port mask */
unsigned char age:1; /* age */
unsigned char staticEn:1; /* static */
unsigned char valid:1; /* valid */
} ROBO_ARL_SEARCH_RESULT_MCAST_CTRL_STRUC;
/* BCM5350 extension register */
typedef struct _ROBO_ARL_SEARCH_RESULT_EXTENSION
{
unsigned int prio:2; /* priority */
unsigned int portMask:1; /* MSB (MII) of port mask for multicast */
unsigned int reserved:5;
} ROBO_ARL_SEARCH_RESULT_EXTENSION;
typedef struct _ROBO_ARL_ENTRY_MCAST_STRUC
{
ROBO_ARL_ENTRY_MAC_STRUC mac; /* MAC address */
ROBO_ARL_ENTRY_MCAST_CTRL_STRUC ctrl; /* control bits */
} ROBO_ARL_ENTRY_MCAST_STRUC;
typedef struct _ROBO_ARL_SEARCH_RESULT_MCAST_STRUC
{
ROBO_ARL_ENTRY_MAC_STRUC mac; /* MAC address */
ROBO_ARL_SEARCH_RESULT_MCAST_CTRL_STRUC ctrl; /* control bits */
} ROBO_ARL_SEARCH_RESULT_MCAST_STRUC;
#define ROBO_ARL_RW_CTRL 0x00 /* ARL Read/Write Control : 8bit */
#define ROBO_ARL_MAC_ADDR_IDX 0x02 /* MAC Address Index: 48bit */
#define ROBO_ARL_VID_TABLE_IDX 0x08 /* VID Table Address Index: 8bit */
#define ROBO_ARL_ENTRY0 0x10 /* ARL Entry 0 : 64 bit */
#define ROBO_ARL_ENTRY1 0x18 /* ARL Entry 1 : 64 bit */
#define ROBO_ARL_SEARCH_CTRL 0x20 /* ARL Search Control: 8bit */
#define ROBO_ARL_SEARCH_ADDR 0x22 /* ARL Search Address: 16bit */
#define ROBO_ARL_SEARCH_RESULT 0x24 /* ARL Search Result: 64bit */
#define ROBO_ARL_SEARCH_RESULT_EXT 0x2c /* ARL Search Result Extension (5350): 8bit */
#define ROBO_ARL_VID_ENTRY0 0x30 /* ARL VID Entry 0: 64bit */
#define ROBO_ARL_VID_ENTRY1 0x32 /* ARL VID Entry 1: 64bit */
#define ROBO_ARL_SEARCH_CTRL_53115 0x50 /* ARL Search Control: 8bit */
#define ROBO_ARL_SEARCH_ADDR_53115 0x51 /* ARL Search Address: 16bit */
#define ROBO_ARL_SEARCH_RESULT_53115 0x60 /* ARL Search Result: 64bit */
#define ROBO_ARL_SEARCH_RESULT_EXT_53115 0x68 /* ARL Search Result Extension (53115): 16bit */
/* BCM5395/5397/5398/53115 */
#define ROBO_VTBL_ACCESS 0x60 /* VLAN table access: 8bit */
#define ROBO_VTBL_INDX 0x61 /* VLAN table address index: 16bit */
#define ROBO_VTBL_ENTRY 0x63 /* VLAN table entry: 32bit */
#define ROBO_VTBL_ACCESS_5395 0x80 /* VLAN table access: 8bit */
#define ROBO_VTBL_INDX_5395 0x81 /* VLAN table address index: 16bit */
#define ROBO_VTBL_ENTRY_5395 0x83 /* VLAN table entry: 32bit */
/* BCM5325m MANAGEMENT FRAME REGISTERS (0x6) REGISTER MAP: 8/16 bit regs */
#define ROBO_MGMT_FRAME_RD_DATA 0x00 /* Management Frame Read Data :8bit*/
#define ROBO_MGMT_FRAME_WR_DATA 0x01 /* Management Frame Write Data:8bit*/
#define ROBO_MGMT_FRAME_WR_CTRL 0x02 /* Write Control: 16bit */
#define ROBO_MGMT_FRAME_RD_STAT 0x04 /* Read Status: 16bit */
/* BCM5325m MEMORY ACCESS REGISTERS (Page 0x08) REGISTER MAP: 32 bit regs */
#define MEM_TABLE_READ 1 /* for read/write state in mem access reg */
#define MEM_TABLE_WRITE 0 /* for read/write state in mem access reg */
#define MEM_TABLE_ACCESS_START 1 /* for mem access read/write start */
#define MEM_TABLE_ACCESS_DONE 0 /* for mem access read/write done */
#define VLAN_TABLE_ADDR 0x3800 /* BCM5380 only */
#ifdef BCM5380
#define NUM_ARL_TABLE_ENTRIES 4096 /* number of entries in ARL table */
#define NUM_VLAN_TABLE_ENTRIES 2048 /* number of entries in VLAN table */
#define ARL_TABLE_ADDR 0 /* offset of ARL table start */
#else
#define NUM_ARL_TABLE_ENTRIES 2048 /* number of entries in ARL table */
#define NUM_VLAN_TABLE_ENTRIES 256 /* number of entries in VLAN table */
#define ARL_TABLE_ADDR 0x3800 /* offset of ARL table start */
/* corresponding values for 5350 */
#define NUM_ARL_TABLE_ENTRIES_5350 1024 /* number of entries in ARL table (5350) */
#define NUM_VLAN_TABLE_ENTRIES_5350 16 /* number of entries in VLAN table */
#define ARL_TABLE_ADDR_5350 0x1c00 /* offset of ARL table start (5350) */
#endif
#define NUM_ARL_TABLE_ENTRIES_53115 4096 /* number of entries in ARL table (53115) */
#define NUM_VLAN_TABLE_ENTRIES_53115 4096 /* number of entries in VLAN table */
typedef struct _ROBO_MEM_ACCESS_CTRL_STRUC
{
unsigned int memAddr:14; /* 64-bit memory address */
unsigned char rsvd:4; /* reserved */
unsigned char readEn:1; /* read enable (0 == write) */
unsigned char startDone:1;/* memory access start/done */
unsigned int rsvd1:12; /* reserved */
} ROBO_MEM_ACCESS_CTRL_STRUC;
typedef struct _ROBO_MEM_ACCESS_DATA_STRUC
{
unsigned int memData[2]; /* 64-bit data */
unsigned short rsvd; /* reserved */
} ROBO_MEM_ACCESS_DATA_STRUC;
#ifdef BCM5380
typedef struct _ROBO_ARL_TABLE_DATA_STRUC
{
unsigned char MACaddr[6]; /* MAC addr */
unsigned int portID:4; /* port ID */
unsigned int chipID:2; /* chip ID */
unsigned int rsvd:6; /* reserved */
unsigned int highPrio:1; /* high priority address */
unsigned int age:1; /* entry accessed/learned since ageing process */
unsigned int staticAddr:1;/* entry is static */
unsigned int valid:1; /* entry is valid */
unsigned int vid:12; /* vlan id */
unsigned int rsvd2:4; /* reserved */
} ROBO_ARL_TABLE_DATA_STRUC;
#else
typedef struct _ROBO_ARL_TABLE_DATA_STRUC
{
unsigned char MACaddr[6]; /* MAC addr */
unsigned int portID:4; /* port ID */
unsigned int chipID:2; /* chip ID */
unsigned int rsvd:7; /* reserved */
unsigned int age:1; /* entry accessed/learned since ageing process */
unsigned int staticAddr:1;/* entry is static */
unsigned int valid:1; /* entry is valid */
} ROBO_ARL_TABLE_DATA_STRUC;
#endif
/* multicast format*/
typedef struct _ROBO_ARL_TABLE_MCAST_DATA_STRUC
{
unsigned char MACaddr[6]; /* MAC addr */
unsigned int portMask:12;/* multicast port mask */
unsigned char prio:1; /* priority */
unsigned char gigPort:1; /* gigabit port 1 mask */
unsigned char staticEn:1; /* static */
unsigned char valid:1; /* valid */
unsigned int vid:12; /* vlan id */
unsigned int rsvd2:4; /* reserved */
} ROBO_ARL_TABLE_MCAST_DATA_STRUC;
#define ROBO_MEM_ACCESS_CTRL 0x00 /* Memory Read/Write Control :32bit*/
#define ROBO_MEM_ACCESS_DATA 0x04 /* Memory Read/Write Data:64bit*/
/* BCM5325m SWITCH PORT (0x10-18) REGISTER MAP: 8/16 bit regs */
typedef struct _ROBO_MII_CTRL_STRUC
{
unsigned char rsvd:8; /* reserved */
unsigned char duplex:1; /* duplex mode */
unsigned char restartAN:1;/* restart auto-negotiation */
unsigned char rsvd1:1; /* reserved */
unsigned char powerDown:1;/* power down */
unsigned char ANenable:1; /* auto-negotiation enable */
unsigned char speed:1; /* forced speed selection */
unsigned char loopback:1; /* loopback */
unsigned char reset:1; /* reset */
} ROBO_MII_CTRL_STRUC;
typedef struct _ROBO_MII_AN_ADVERT_STRUC
{
unsigned char selector:5; /* advertise selector field */
unsigned char T10BaseT:1; /* advertise 10BaseT */
unsigned char T10BaseTFull:1; /* advertise 10BaseT, full duplex */
unsigned char T100BaseX:1; /* advertise 100BaseX */
unsigned char T100BaseXFull:1;/* advertise 100BaseX full duplex */
unsigned char noT4:1; /* do not advertise T4 */
unsigned char pause:1; /* advertise pause for full duplex */
unsigned char rsvd:2; /* reserved */
unsigned char remoteFault:1; /* transmit remote fault */
unsigned char rsvd1:1; /* reserved */
unsigned char nextPage:1; /* nex page operation supported */
} ROBO_MII_AN_ADVERT_STRUC;
#define ROBO_MII_CTRL 0x00 /* Port MII Control */
#define ROBO_MII_STAT 0x02 /* Port MII Status */
/* Fields of link status register */
#define ROBO_MII_STAT_JABBER (1<<1) /* Jabber detected */
#define ROBO_MII_STAT_LINK (1<<2) /* Link status */
#define ROBO_MII_PHYID_HI 0x04 /* Port PHY ID High */
#define ROBO_MII_PHYID_LO 0x06 /* Port PHY ID Low */
#define ROBO_MII_ANA_REG 0x08 /* MII Auto-Neg Advertisement */
#define ROBO_MII_ANP_REG 0x0a /* MII Auto-Neg Partner Ability */
#define ROBO_MII_AN_EXP_REG 0x0c /* MII Auto-Neg Expansion */
#define ROBO_MII_AN_NP_REG 0x0e /* MII next page */
#define ROBO_MII_ANP_NP_REG 0x10 /* MII Partner next page */
#define ROBO_MII_100BX_AUX_CTRL 0x20 /* 100BASE-X Auxiliary Control */
#define ROBO_MII_100BX_AUX_STAT 0x22 /* 100BASE-X Auxiliary Status */
#define ROBO_MII_100BX_RCV_ERR_CTR 0x24 /* 100BASE-X Receive Error Ctr */
#define ROBO_MII_100BX_RCV_FS_ERR 0x26 /* 100BASE-X Rcv False Sense Ctr */
#define ROBO_MII_AUX_CTRL 0x30 /* Auxiliary Control/Status */
/* Fields of Auxiliary control register */
#define ROBO_MII_AUX_CTRL_FD (1<<0) /* Full duplex link detected*/
#define ROBO_MII_AUX_CTRL_SP100 (1<<1) /* Speed 100 indication */
#define ROBO_MII_AUX_STATUS 0x32 /* Aux Status Summary */
#define ROBO_MII_CONN_STATUS 0x34 /* Aux Connection Status */
#define ROBO_MII_AUX_MODE2 0x36 /* Aux Mode 2 */
#define ROBO_MII_AUX_ERR_STATUS 0x38 /* Aux Error and General Status */
#define ROBO_MII_AUX_MULTI_PHY 0x3c /* Aux Multiple PHY Register*/
#define ROBO_MII_BROADCOM_TEST 0x3e /* Broadcom Test Register */
/* BCM5325m PORT MIB REGISTERS (Pages 0x20-0x24,0x28) REGISTER MAP: 64/32 */
/* Tranmit Statistics */
#define ROBO_MIB_TX_OCTETS 0x00 /* 64b: TxOctets */
#define ROBO_MIB_TX_DROP_PKTS 0x08 /* 32b: TxDropPkts */
#define ROBO_MIB_TX_BC_PKTS 0x10 /* 32b: TxBroadcastPkts */
#define ROBO_MIB_TX_MC_PKTS 0x14 /* 32b: TxMulticastPkts */
#define ROBO_MIB_TX_UC_PKTS 0x18 /* 32b: TxUnicastPkts */
#define ROBO_MIB_TX_COLLISIONS 0x1c /* 32b: TxCollisions */
#define ROBO_MIB_TX_SINGLE_COLLISIONS 0x20 /* 32b: TxSingleCollision */
#define ROBO_MIB_TX_MULTI_COLLISIONS 0x24 /* 32b: TxMultiCollision */
#define ROBO_MIB_TX_DEFER_TX 0x28 /* 32b: TxDeferred Transmit */
#define ROBO_MIB_TX_LATE_COLLISIONS 0x2c /* 32b: TxLateCollision */
#define ROBO_MIB_EXCESS_COLLISIONS 0x30 /* 32b: TxExcessiveCollision*/
#define ROBO_MIB_FRAME_IN_DISCARDS 0x34 /* 32b: TxFrameInDiscards */
#define ROBO_MIB_TX_PAUSE_PKTS 0x38 /* 32b: TxPausePkts */
/* Receive Statistics */
#define ROBO_MIB_RX_OCTETS 0x44 /* 64b: RxOctets */
#define ROBO_MIB_RX_UNDER_SIZE_PKTS 0x4c /* 32b: RxUndersizePkts(runts)*/
#define ROBO_MIB_RX_PAUSE_PKTS 0x50 /* 32b: RxPausePkts */
#define ROBO_MIB_RX_PKTS_64 0x54 /* 32b: RxPkts64Octets */
#define ROBO_MIB_RX_PKTS_65_TO_127 0x58 /* 32b: RxPkts64to127Octets*/
#define ROBO_MIB_RX_PKTS_128_TO_255 0x5c /* 32b: RxPkts128to255Octets*/
#define ROBO_MIB_RX_PKTS_256_TO_511 0x60 /* 32b: RxPkts256to511Octets*/
#define ROBO_MIB_RX_PKTS_512_TO_1023 0x64 /* 32b: RxPkts512to1023Octets*/
#define ROBO_MIB_RX_PKTS_1024_TO_1522 0x68 /* 32b: RxPkts1024to1522Octets*/
#define ROBO_MIB_RX_OVER_SIZE_PKTS 0x6c /* 32b: RxOversizePkts*/
#define ROBO_MIB_RX_JABBERS 0x70 /* 32b: RxJabbers*/
#define ROBO_MIB_RX_ALIGNMENT_ERRORS 0x74 /* 32b: RxAlignmentErrors*/
#define ROBO_MIB_RX_FCS_ERRORS 0x78 /* 32b: RxFCSErrors */
#define ROBO_MIB_RX_GOOD_OCTETS 0x7c /* 32b: RxGoodOctets */
#define ROBO_MIB_RX_DROP_PKTS 0x84 /* 32b: RxDropPkts */
#define ROBO_MIB_RX_UC_PKTS 0x88 /* 32b: RxUnicastPkts */
#define ROBO_MIB_RX_MC_PKTS 0x8c /* 32b: RxMulticastPkts */
#define ROBO_MIB_RX_BC_PKTS 0x90 /* 32b: RxBroadcastPkts */
#define ROBO_MIB_RX_SA_CHANGES 0x94 /* 32b: RxSAChanges */
#define ROBO_MIB_RX_FRAGMENTS 0x98 /* 32b: RxFragments */
#define ROBO_MIB_RX_EXCESS_SZ_DISC 0x9c /* 32b: RxExcessSizeDisc*/
#define ROBO_MIB_RX_SYMBOL_ERROR 0xa0 /* 32b: RxSymbolError */
/* BCM5350 MIB Statistics */
/* Group 0 */
#define ROBO_MIB_TX_GOOD_PKTS 0x00 /* 16b: TxGoodPkts */
#define ROBO_MIB_TX_UNICAST_PKTS 0x02 /* 16b: TxUnicastPkts */
#define ROBO_MIB_RX_GOOD_PKTS 0x04 /* 16b: RxGoodPkts */
#define ROBO_MIB_RX_GOOD_UNICAST_PKTS 0x06 /* 16b: RxGoodUnicastPkts */
/* Group 1 */
#define ROBO_MIB_TX_COLLISION 0x00 /* 16b: TxCollision */
#define ROBO_MIB_TX_OCTETS_5350 0x02 /* 16b: TxOctets */
#define ROBO_MIB_RX_FCS_ERRORS_5350 0x04 /* 16b: RxFCSErrors */
#define ROBO_MIB_RX_GOOD_OCTETS_5350 0x06 /* 16b: RxGoodOctets */
/* BCM5325m QoS REGISTERS (Page 0x30) REGISTER MAP: 8/16 */
#define ROBO_QOS_CTRL 0x00 /* 16b: QoS Control Register */
#define ROBO_QOS_LOCAL_WEIGHT_CTRL 0x10 /* 8b: Local HQ/LQ Weight Register*/
#define ROBO_QOS_CPU_WEIGHT_CTRL 0x12 /* 8b: CPU HQ/LQ Weight Register*/
#define ROBO_QOS_PAUSE_ENA 0x13 /* 16b: Qos Pause Enable Register*/
#define ROBO_QOS_PRIO_THRESHOLD 0x15 /* 8b: Priority Threshold Register*/
#define ROBO_QOS_RESERVED 0x16 /* 8b: Qos Reserved Register */
/* BCM5325m VLAN REGISTERS (Page 0x34) REGISTER MAP: 8/16bit */
typedef struct _ROBO_VLAN_CTRL0_STRUC
{
unsigned char frameControlP:2; /* 802.1P frame control */
unsigned char frameControlQ:2; /* 802.1Q frame control */
unsigned char dropMissedVID:1; /* enable drop missed VID packet */
unsigned char vidMacHash:1; /* VID_MAC hash enable */
unsigned char vidMacCheck:1; /* VID_MAC check enable */
unsigned char VLANen:1; /* 802.1Q VLAN enable */
} ROBO_VLAN_CTRL0_STRUC;
#define VLAN_TABLE_WRITE 1 /* for read/write state in table access reg */
#define VLAN_TABLE_READ 0 /* for read/write state in table access reg */
#define VLAN_ID_HIGH_BITS 0 /* static high bits in table access reg */
#define VLAN_ID_MAX 15 /* max VLAN id (5350) */
#define VLAN_ID_MAX_5365 255 /* max VLAN id */
#define VLAN_ID_MAX_5395 4094 /* max VLAN id (5395) */
#define VLAN_ID_MASK VLAN_ID_MAX /* VLAN id mask */
#ifdef BCM5380
#define VLAN_UNTAG_SHIFT 13 /* for postioning untag bits in write reg */
#define VLAN_VALID 0x4000000 /* valid bit in write reg */
#else
#define VLAN_UNTAG_SHIFT 7 /* for postioning untag bits in write reg */
#define VLAN_VALID 0x4000 /* valid bit in write reg */
/* corresponding values for 5350 */
#define VLAN_UNTAG_SHIFT_5350 6 /* for postioning untag bits in write reg */
#define VLAN_VALID_5350 0x00100000 /* valid bit in write reg */
#endif
typedef struct _ROBO_VLAN_TABLE_ACCESS_STRUC
{
unsigned char VLANid:8; /* VLAN ID (low 8 bits) */
unsigned char VLANidHi:4; /* VLAN ID (fixed upper portion) */
unsigned char readWriteState:1; /* read/write state (write = 1) */
volatile unsigned char readWriteEnable:1; /* table read/write enable */
unsigned char rsvd:2; /* reserved */
} ROBO_VLAN_TABLE_ACCESS_STRUC;
#ifdef BCM5380
typedef struct _ROBO_VLAN_READ_WRITE_STRUC
{
unsigned int VLANgroup:13;/* VLAN group mask */
unsigned int VLANuntag:13;/* VLAN untag enable mask */
unsigned char valid:1; /* valid */
unsigned char rsvd:5; /* reserved */
} ROBO_VLAN_READ_WRITE_STRUC;
#else
typedef struct _ROBO_VLAN_READ_WRITE_STRUC
{
unsigned char VLANgroup:7; /* VLAN group mask */
unsigned char VLANuntag:7; /* VLAN untag enable mask */
unsigned char valid:1; /* valid */
unsigned char rsvd:1; /* reserved */
} ROBO_VLAN_READ_WRITE_STRUC;
typedef struct _ROBO_VLAN_READ_WRITE_STRUC_5350
{
unsigned char VLANgroup:6; /* VLAN group mask */
unsigned char VLANuntag:6; /* VLAN untag enable mask */
unsigned char highVID:8; /* upper bits of vid */
unsigned char valid:1; /* valid */
unsigned int rsvd:11; /* reserved */
} ROBO_VLAN_READ_WRITE_STRUC_5350;
#endif
#define ROBO_VLAN_CTRL0 0x00 /* 8b: VLAN Control 0 Register */
#define ROBO_VLAN_CTRL1 0x01 /* 8b: VLAN Control 1 Register */
#define ROBO_VLAN_CTRL2 0x02 /* 8b: VLAN Control 2 Register */
#define ROBO_VLAN_CTRL3 0x03 /* 8b: VLAN Control 3 Register */
#define ROBO_VLAN_CTRL4 0x04 /* 8b: VLAN Control 4 Register */
#define ROBO_VLAN_CTRL5 0x05 /* 8b: VLAN Control 5 Register */
#define ROBO_VLAN_TABLE_ACCESS_5365 0x08 /* 14b: VLAN Table Access Register */
#define ROBO_VLAN_TABLE_ACCESS 0x06 /* 14b: VLAN Table Access Register (5350) */
#define ROBO_VLAN_WRITE_5365 0x0a /* 15b: VLAN Write Register */
#define ROBO_VLAN_WRITE 0x08 /* 15b: VLAN Write Register (5350) */
#define ROBO_VLAN_READ 0x0c /* 15b: VLAN Read Register */
#define ROBO_VLAN_PORT0_DEF_TAG 0x10 /* 16b: VLAN Port 0 Default Tag Register */
#define ROBO_VLAN_PORT1_DEF_TAG 0x12 /* 16b: VLAN Port 1 Default Tag Register */
#define ROBO_VLAN_PORT2_DEF_TAG 0x14 /* 16b: VLAN Port 2 Default Tag Register */
#define ROBO_VLAN_PORT3_DEF_TAG 0x16 /* 16b: VLAN Port 3 Default Tag Register */
#define ROBO_VLAN_PORT4_DEF_TAG 0x18 /* 16b: VLAN Port 4 Default Tag Register */
#define ROBO_VLAN_PORTMII_DEF_TAG 0x1a /* 16b: VLAN Port MII Default Tag Register */
/* 5380 only */
#define ROBO_VLAN_PORT5_DEF_TAG 0x1a /* 16b: VLAN Port 5 Default Tag Register */
#define ROBO_VLAN_PORT6_DEF_TAG 0x1c /* 16b: VLAN Port 6 Default Tag Register */
#define ROBO_VLAN_PORT7_DEF_TAG 0x1e /* 16b: VLAN Port 7 Default Tag Register */
#define ROBO_VLAN_PORT8_DEF_TAG 0x20 /* 16b: VLAN Port 8 Default Tag Register */
/* 53115 only */
#define ROBO_DUPLEX_STAT_SUMMARY_53115 0x08 /* Duplex Status Summary: 16bit */
#define ROBO_JUMBO_PAGE 0x40
#define ROBO_JUMBO_CTRL 0x01 /* 32bit */
#define ROBO_JUMBO_SIZE 0x05 /* 16bit */
#ifndef _CFE_
#pragma pack()
#endif
#endif /* !__BCM535M_H_ */

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package/kernel/switch/src/gpio.h
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/*
* Copyright (C) 2006 OpenWrt.org
*
* This is free software, licensed under the GNU General Public License v2.
* See /LICENSE for more information.
*/
#ifndef __GPIO_H
#define __GPIO_H
#ifdef CONFIG_BCM47XX
#include <linux/gpio.h>
#else
#warning "Unsupported configuration."
#define bcm47xx_gpio_in(mask) (-1U)
#define bcm47xx_gpio_out(mask, value) (-1U)
#define bcm47xx_gpio_outen(mask, value) (-1U)
#define bcm47xx_gpio_control(mask, value) (-1U)
#define bcm47xx_gpio_intmask(mask, value) (-1U)
#define bcm47xx_gpio_polarity(mask, value) (-1U)
#endif
#endif /* __GPIO_H */

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package/kernel/switch/src/switch-adm.c
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/*
* ADMTEK Adm6996 switch configuration module
*
* Copyright (C) 2005 Felix Fietkau <nbd@nbd.name>
*
* Partially based on Broadcom Home Networking Division 10/100 Mbit/s
* Ethernet Device Driver (from Montavista 2.4.20_mvl31 Kernel).
* Copyright (C) 2004 Broadcom Corporation
*
* adm_rreg function from adm6996
* Copyright (C) 2004 Nikki Chumakov <nikki@gattaca.ru>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/if.h>
#include <linux/if_arp.h>
#include <linux/sockios.h>
#include <linux/delay.h>
#include <asm/uaccess.h>
#include "switch-core.h"
#include "gpio.h"
#ifdef CONFIG_BCM47XX
#include <bcm47xx_nvram.h>
#endif
#define DRIVER_NAME "adm6996"
#define DRIVER_VERSION "0.01"
static int eecs = 0;
static int eesk = 0;
static int eedi = 0;
static int eerc = 0;
static int force = 0;
MODULE_AUTHOR("Felix Fietkau <openwrt@nbd.name>");
MODULE_LICENSE("GPL");
module_param(eecs, int, 0);
module_param(eesk, int, 0);
module_param(eedi, int, 0);
module_param(eerc, int, 0);
module_param(force, int, 0);
/* Minimum timing constants */
#define EECK_EDGE_TIME 3 /* 3us - max(adm 2.5us, 93c 1us) */
#define EEDI_SETUP_TIME 1 /* 1us - max(adm 10ns, 93c 400ns) */
#define EECS_SETUP_TIME 1 /* 1us - max(adm no, 93c 200ns) */
/* Handy macros for writing fixed length values */
#define adm_write8(cs, b) { __u8 val = (__u8) (b); adm_write(cs, &val, sizeof(val)*8); }
#define adm_write16(cs, w) { __u16 val = hton16(w); adm_write(cs, (__u8 *)&val, sizeof(val)*8); }
#define adm_write32(cs, i) { uint32 val = hton32(i); adm_write(cs, (__u8 *)&val, sizeof(val)*8); }
#define atoi(str) simple_strtoul(((str != NULL) ? str : ""), NULL, 0)
#ifdef CONFIG_BCM47XX
/* Return gpio pin number assigned to the named pin */
/*
* Variable should be in format:
*
* gpio<N>=pin_name
*
* 'def_pin' is returned if there is no such variable found.
*/
static unsigned int get_gpiopin(char *pin_name, unsigned int def_pin)
{
char name[] = "gpioXXXX";
char val[10];
unsigned int pin;
/* Go thru all possibilities till a match in pin name */
for (pin = 0; pin < 16; pin ++) {
sprintf(name, "gpio%d", pin);
if (bcm47xx_nvram_getenv(name, val, sizeof(val)) >= 0) {
if (!strcmp(val, pin_name))
return pin;
}
}
return def_pin;
}
#endif
static void adm_write(int cs, char *buf, unsigned int bits)
{
int i, len = (bits + 7) / 8;
__u8 mask;
bcm47xx_gpio_out(eecs, (cs ? eecs : 0));
udelay(EECK_EDGE_TIME);
/* Byte assemble from MSB to LSB */
for (i = 0; i < len; i++) {
/* Bit bang from MSB to LSB */
for (mask = 0x80; mask && bits > 0; mask >>= 1, bits --) {
/* Clock low */
bcm47xx_gpio_out(eesk, 0);
udelay(EECK_EDGE_TIME);
/* Output on rising edge */
bcm47xx_gpio_out(eedi, ((mask & buf[i]) ? eedi : 0));
udelay(EEDI_SETUP_TIME);
/* Clock high */
bcm47xx_gpio_out(eesk, eesk);
udelay(EECK_EDGE_TIME);
}
}
/* Clock low */
bcm47xx_gpio_out(eesk, 0);
udelay(EECK_EDGE_TIME);
if (cs)
bcm47xx_gpio_out(eecs, 0);
}
static void adm_read(int cs, char *buf, unsigned int bits)
{
int i, len = (bits + 7) / 8;
__u8 mask;
bcm47xx_gpio_out(eecs, (cs ? eecs : 0));
udelay(EECK_EDGE_TIME);
/* Byte assemble from MSB to LSB */
for (i = 0; i < len; i++) {
__u8 byte;
/* Bit bang from MSB to LSB */
for (mask = 0x80, byte = 0; mask && bits > 0; mask >>= 1, bits --) {
__u8 gp;
/* Clock low */
bcm47xx_gpio_out(eesk, 0);
udelay(EECK_EDGE_TIME);
/* Input on rising edge */
gp = bcm47xx_gpio_in(~0);
if (gp & eedi)
byte |= mask;
/* Clock high */
bcm47xx_gpio_out(eesk, eesk);
udelay(EECK_EDGE_TIME);
}
*buf++ = byte;
}
/* Clock low */
bcm47xx_gpio_out(eesk, 0);
udelay(EECK_EDGE_TIME);
if (cs)
bcm47xx_gpio_out(eecs, 0);
}
/* Enable outputs with specified value to the chip */
static void adm_enout(__u8 pins, __u8 val)
{
/* Prepare GPIO output value */
bcm47xx_gpio_out(pins, val);
/* Enable GPIO outputs */
bcm47xx_gpio_outen(pins, pins);
udelay(EECK_EDGE_TIME);
}
/* Disable outputs to the chip */
static void adm_disout(__u8 pins)
{
/* Disable GPIO outputs */
bcm47xx_gpio_outen(pins, 0);
udelay(EECK_EDGE_TIME);
}
/* Advance clock(s) */
static void adm_adclk(int clocks)
{
int i;
for (i = 0; i < clocks; i++) {
/* Clock high */
bcm47xx_gpio_out(eesk, eesk);
udelay(EECK_EDGE_TIME);
/* Clock low */
bcm47xx_gpio_out(eesk, 0);
udelay(EECK_EDGE_TIME);
}
}
static __u32 adm_rreg(__u8 table, __u8 addr)
{
/* cmd: 01 10 T DD R RRRRRR */
__u8 bits[6] = {
0xFF, 0xFF, 0xFF, 0xFF,
(0x06 << 4) | ((table & 0x01) << 3 | (addr&64)>>6),
((addr&63)<<2)
};
__u8 rbits[4];
/* Enable GPIO outputs with all pins to 0 */
adm_enout((__u8)(eecs | eesk | eedi), 0);
adm_write(0, bits, 46);
adm_disout((__u8)(eedi));
adm_adclk(2);
adm_read (0, rbits, 32);
/* Extra clock(s) required per datasheet */
adm_adclk(2);
/* Disable GPIO outputs */
adm_disout((__u8)(eecs | eesk));
if (!table) /* EEPROM has 16-bit registers, but pumps out two registers in one request */
return (addr & 0x01 ? (rbits[0]<<8) | rbits[1] : (rbits[2]<<8) | (rbits[3]));
else
return (rbits[0]<<24) | (rbits[1]<<16) | (rbits[2]<<8) | rbits[3];
}
/* Write chip configuration register */
/* Follow 93c66 timing and chip's min EEPROM timing requirement */
void
adm_wreg(__u8 addr, __u16 val)
{
/* cmd(27bits): sb(1) + opc(01) + addr(bbbbbbbb) + data(bbbbbbbbbbbbbbbb) */
__u8 bits[4] = {
(0x05 << 5) | (addr >> 3),
(addr << 5) | (__u8)(val >> 11),
(__u8)(val >> 3),
(__u8)(val << 5)
};
/* Enable GPIO outputs with all pins to 0 */
adm_enout((__u8)(eecs | eesk | eedi), 0);
/* Write cmd. Total 27 bits */
adm_write(1, bits, 27);
/* Extra clock(s) required per datasheet */
adm_adclk(2);
/* Disable GPIO outputs */
adm_disout((__u8)(eecs | eesk | eedi));
}
/* Port configuration registers */
static int port_conf[] = { 0x01, 0x03, 0x05, 0x07, 0x08, 0x09 };
/* Bits in VLAN port mapping */
static int vlan_ports[] = { 1 << 0, 1 << 2, 1 << 4, 1 << 6, 1 << 7, 1 << 8 };
static int handle_vlan_port_read(void *driver, char *buf, int nr)
{
int ports, i, c, len = 0;
if ((nr < 0) || (nr > 15))
return 0;
/* Get VLAN port map */
ports = adm_rreg(0, 0x13 + nr);
for (i = 0; i <= 5; i++) {
if (ports & vlan_ports[i]) {
c = adm_rreg(0, port_conf[i]);
len += sprintf(buf + len, "%d", i);
if (c & (1 << 4)) {
buf[len++] = 't';
if (((c & (0xf << 10)) >> 10) == nr)
buf[len++] = '*';
} else if (i == 5)
buf[len++] = 'u';
buf[len++] = '\t';
}
}
len += sprintf(buf + len, "\n");
return len;
}
static int handle_vlan_port_write(void *driver, char *buf, int nr)
{
int i, cfg, ports;
switch_driver *d = (switch_driver *) driver;
switch_vlan_config *c = switch_parse_vlan(d, buf);
if (c == NULL)
return -1;
ports = adm_rreg(0, 0x13 + nr);
for (i = 0; i < d->ports; i++) {
if (c->port & (1 << i)) {
ports |= vlan_ports[i];
cfg = adm_rreg(0, port_conf[i]);
/* Tagging */
if (c->untag & (1 << i))
cfg &= ~(1 << 4);
else
cfg |= (1 << 4);
if ((c->untag | c->pvid) & (1 << i)) {
cfg = (cfg & ~(0xf << 10)) | (nr << 10);
}
adm_wreg(port_conf[i], (__u16) cfg);
} else {
ports &= ~(vlan_ports[i]);
}
}
adm_wreg(0x13 + nr, (__u16) ports);
kfree(c);
return 0;
}
static int handle_port_enable_read(void *driver, char *buf, int nr)
{
return sprintf(buf, "%d\n", ((adm_rreg(0, port_conf[nr]) & (1 << 5)) ? 0 : 1));
}
static int handle_port_enable_write(void *driver, char *buf, int nr)
{
int reg = adm_rreg(0, port_conf[nr]);
if (buf[0] == '0')
reg |= (1 << 5);
else if (buf[0] == '1')
reg &= ~(1 << 5);
else return -1;
adm_wreg(port_conf[nr], (__u16) reg);
return 0;
}
static int handle_port_media_read(void *driver, char *buf, int nr)
{
int len;
int media = 0;
int reg = adm_rreg(0, port_conf[nr]);
if (reg & (1 << 1))
media |= SWITCH_MEDIA_AUTO;
if (reg & (1 << 2))
media |= SWITCH_MEDIA_100;
if (reg & (1 << 3))
media |= SWITCH_MEDIA_FD;
len = switch_print_media(buf, media);
return len + sprintf(buf + len, "\n");
}
static int handle_port_media_write(void *driver, char *buf, int nr)
{
int media = switch_parse_media(buf);
int reg = adm_rreg(0, port_conf[nr]);
if (media < 0 || media & SWITCH_MEDIA_1000)
return -1;
reg &= ~((1 << 1) | (1 << 2) | (1 << 3));
if (media & SWITCH_MEDIA_AUTO)
reg |= 1 << 1;
if (media & SWITCH_MEDIA_100)
reg |= 1 << 2;
if (media & SWITCH_MEDIA_FD)
reg |= 1 << 3;
adm_wreg(port_conf[nr], reg);
return 0;
}
static int handle_vlan_enable_read(void *driver, char *buf, int nr)
{
return sprintf(buf, "%d\n", ((adm_rreg(0, 0x11) & (1 << 5)) ? 1 : 0));
}
static int handle_vlan_enable_write(void *driver, char *buf, int nr)
{
int reg = adm_rreg(0, 0x11);
if (buf[0] == '1')
reg |= (1 << 5);
else if (buf[0] == '0')
reg &= ~(1 << 5);
else return -1;
adm_wreg(0x11, (__u16) reg);
return 0;
}
static int handle_reset(void *driver, char *buf, int nr)
{
int i;
u32 cfg;
/*
* Reset sequence: RC high->low(100ms)->high(30ms)
*
* WAR: Certain boards don't have the correct power on
* reset logic therefore we must explicitly perform the
* sequence in software.
*/
if (eerc) {
/* Keep RC high for at least 20ms */
adm_enout(eerc, eerc);
for (i = 0; i < 20; i ++)
udelay(1000);
/* Keep RC low for at least 100ms */
adm_enout(eerc, 0);
for (i = 0; i < 100; i++)
udelay(1000);
/* Set default configuration */
adm_enout((__u8)(eesk | eedi), eesk);
/* Keep RC high for at least 30ms */
adm_enout(eerc, eerc);
for (i = 0; i < 30; i++)
udelay(1000);
/* Leave RC high and disable GPIO outputs */
adm_disout((__u8)(eecs | eesk | eedi));
}
/* set up initial configuration for cpu port */
cfg = (0x8000 | /* Auto MDIX */
(0xf << 10) | /* PVID */
(1 << 4) | /* Tagging */
0xf); /* full duplex, 100Mbps, auto neg, flow ctrl */
adm_wreg(port_conf[5], cfg);
/* vlan mode select register (0x11): vlan on, mac clone */
adm_wreg(0x11, 0xff30);
return 0;
}
static int handle_registers(void *driver, char *buf, int nr)
{
int i, len = 0;
for (i = 0; i <= 0x33; i++) {
len += sprintf(buf + len, "0x%02x: 0x%04x\n", i, adm_rreg(0, i));
}
return len;
}
static int handle_counters(void *driver, char *buf, int nr)
{
int i, len = 0;
for (i = 0; i <= 0x3c; i++) {
len += sprintf(buf + len, "0x%02x: 0x%08x\n", i, adm_rreg(1, i));
}
return len;
}
static int detect_adm(void)
{
int ret = 0;
#ifdef CONFIG_BCM47XX
char buf[20];
int boardflags = 0;
int boardnum = 0;
if (bcm47xx_nvram_getenv("boardflags", buf, sizeof(buf)) >= 0)
boardflags = simple_strtoul(buf, NULL, 0);
if (bcm47xx_nvram_getenv("boardnum", buf, sizeof(buf)) >= 0)
boardnum = simple_strtoul(buf, NULL, 0);
if ((boardnum == 44) && (boardflags == 0x0388)) { /* Trendware TEW-411BRP+ */
ret = 1;
eecs = get_gpiopin("adm_eecs", 2);
eesk = get_gpiopin("adm_eesk", 3);
eedi = get_gpiopin("adm_eedi", 4);
eerc = get_gpiopin("adm_rc", 5);
} else if ((boardflags & 0x80) || force) {
ret = 1;
eecs = get_gpiopin("adm_eecs", 2);
eesk = get_gpiopin("adm_eesk", 3);
eedi = get_gpiopin("adm_eedi", 4);
eerc = get_gpiopin("adm_rc", 0);
} else if (bcm47xx_nvram_getenv("boardtype", buf, sizeof(buf)) >= 0) {
if (strcmp(buf, "bcm94710dev") == 0) {
if (bcm47xx_nvram_getenv("boardnum", buf, sizeof(buf)) >= 0) {
if (strncmp(buf, "42", 2) == 0) {
/* WRT54G v1.1 hack */
eecs = 2;
eesk = 3;
eedi = 5;
ret = 1;
}
}
}
}
if (eecs)
eecs = (1 << eecs);
if (eesk)
eesk = (1 << eesk);
if (eedi)
eedi = (1 << eedi);
if (eerc)
eerc = (1 << eerc);
#else
ret = 1;
#endif
return ret;
}
static int __init adm_init(void)
{
switch_config cfg[] = {
{"registers", handle_registers, NULL},
{"counters", handle_counters, NULL},
{"reset", NULL, handle_reset},
{"enable_vlan", handle_vlan_enable_read, handle_vlan_enable_write},
{NULL, NULL, NULL}
};
switch_config port[] = {
{"enable", handle_port_enable_read, handle_port_enable_write},
{"media", handle_port_media_read, handle_port_media_write},
{NULL, NULL, NULL}
};
switch_config vlan[] = {
{"ports", handle_vlan_port_read, handle_vlan_port_write},
{NULL, NULL, NULL}
};
switch_driver driver = {
name: DRIVER_NAME,
version: DRIVER_VERSION,
interface: "eth0",
ports: 6,
cpuport: 5,
vlans: 16,
driver_handlers: cfg,
port_handlers: port,
vlan_handlers: vlan,
};
snprintf(driver.dev_name, SWITCH_NAME_BUFSZ, DRIVER_NAME);
if (!detect_adm())
return -ENODEV;
return switch_register_driver(&driver);
}
static void __exit adm_exit(void)
{
switch_unregister_driver(DRIVER_NAME);
}
module_init(adm_init);
module_exit(adm_exit);

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package/kernel/switch/src/switch-core.c
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/*
* switch-core.c
*
* Copyright (C) 2005 Felix Fietkau <openwrt@nbd.name>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
*
* Basic doc of driver's /proc interface:
* /proc/switch/<interface>/
* registers: read-only
* counters: read-only
* reset: write causes hardware reset
* enable_vlan: "0", "1"
* port/<port-number>/
* enabled: "0", "1"
* media: "AUTO", "1000FD", "1000HD", "100FD", "100HD", "10FD", "10HD"
* vlan/<port-number>/
* ports: same syntax as for nvram's vlan*ports (eg. "1 2 3 4 5*")
*/
#include <linux/module.h>
#include <linux/init.h>
#include <asm/uaccess.h>
#include <linux/proc_fs.h>
#include <linux/list.h>
#include "switch-core.h"
static int drv_num = 0;
static struct proc_dir_entry *switch_root;
switch_driver drivers;
typedef struct {
struct list_head list;
struct proc_dir_entry *parent;
int nr;
void *driver;
switch_config handler;
} switch_proc_handler;
typedef struct {
struct proc_dir_entry *driver_dir, *port_dir, *vlan_dir;
struct proc_dir_entry **ports, **vlans;
switch_proc_handler data;
int nr;
} switch_priv;
static ssize_t switch_proc_read(struct file *file, char *buf, size_t count, loff_t *ppos);
static ssize_t switch_proc_write(struct file *file, const char *buf, size_t count, void *data);
static struct file_operations switch_proc_fops = {
.read = (ssize_t (*) (struct file *, char __user *, size_t, loff_t *))switch_proc_read,
.write = (ssize_t (*) (struct file *, const char __user *, size_t, loff_t *))switch_proc_write
};
static ssize_t switch_proc_read(struct file *file, char *buf, size_t count, loff_t *ppos)
{
struct proc_dir_entry *dent = PDE(file->f_dentry->d_inode);
char *page;
int len = 0;
if ((page = kmalloc(SWITCH_MAX_BUFSZ, GFP_KERNEL)) == NULL)
return -ENOBUFS;
if (dent->data != NULL) {
switch_proc_handler *handler = (switch_proc_handler *) dent->data;
if (handler->handler.read != NULL)
len += handler->handler.read(handler->driver, page + len, handler->nr);
}
len += 1;
if (*ppos < len) {
len = min_t(int, len - *ppos, count);
if (copy_to_user(buf, (page + *ppos), len)) {
kfree(page);
return -EFAULT;
}
*ppos += len;
} else {
len = 0;
}
kfree(page);
return len;
}
static ssize_t switch_proc_write(struct file *file, const char *buf, size_t count, void *data)
{
struct proc_dir_entry *dent = PDE(file->f_dentry->d_inode);
char *page;
int ret = -EINVAL;
if ((page = kmalloc(count + 1, GFP_KERNEL)) == NULL)
return -ENOBUFS;
if (copy_from_user(page, buf, count)) {
kfree(page);
return -EINVAL;
}
page[count] = 0;
if (dent->data != NULL) {
switch_proc_handler *handler = (switch_proc_handler *) dent->data;
if (handler->handler.write != NULL) {
if ((ret = handler->handler.write(handler->driver, page, handler->nr)) >= 0)
ret = count;
}
}
kfree(page);
return ret;
}
static int handle_driver_name(void *driver, char *buf, int nr)
{
const char *name = ((switch_driver *) driver)->name;
return sprintf(buf, "%s\n", name);
}
static int handle_driver_version(void *driver, char *buf, int nr)
{
const char *version = ((switch_driver *) driver)->version;
strcpy(buf, version);
return sprintf(buf, "%s\n", version);
}
static int handle_driver_cpuport(void *driver, char *buf, int nr)
{
int cpuport = ((switch_driver *) driver)->cpuport;
return sprintf(buf, "%i\n", cpuport);
}
static int handle_driver_ports(void *driver, char *buf, int nr)
{
int ports = ((switch_driver *) driver)->ports;
return sprintf(buf, "%i\n", ports);
}
static int handle_driver_vlans(void *driver, char *buf, int nr)
{
int vlans = ((switch_driver *) driver)->vlans;
return sprintf(buf, "%i\n", vlans);
}
static int handle_driver_dev_name(void *driver, char *buf, int nr)
{
char *dev_name = ((switch_driver *) driver)->dev_name;
return sprintf(buf, "%s\n", dev_name);
}
static void add_handler(switch_driver *driver, const switch_config *handler, struct proc_dir_entry *parent, int nr)
{
switch_priv *priv = (switch_priv *) driver->data;
struct proc_dir_entry *p;
int mode;
switch_proc_handler *tmp;
tmp = (switch_proc_handler *) kmalloc(sizeof(switch_proc_handler), GFP_KERNEL);
if (!tmp)
return;
INIT_LIST_HEAD(&tmp->list);
tmp->parent = parent;
tmp->nr = nr;
tmp->driver = driver;
memcpy(&tmp->handler, handler, sizeof(switch_config));
list_add(&tmp->list, &priv->data.list);
mode = 0;
if (handler->read != NULL) mode |= S_IRUSR;
if (handler->write != NULL) mode |= S_IWUSR;
if ((p = create_proc_entry(handler->name, mode, parent)) != NULL) {
p->data = (void *) tmp;
p->proc_fops = &switch_proc_fops;
}
}
static inline void add_handlers(switch_driver *driver, const switch_config *handlers, struct proc_dir_entry *parent, int nr)
{
int i;
for (i = 0; handlers[i].name != NULL; i++) {
add_handler(driver, &(handlers[i]), parent, nr);
}
}
static void remove_handlers(switch_priv *priv)
{
struct list_head *pos, *q;
switch_proc_handler *tmp;
list_for_each_safe(pos, q, &priv->data.list) {
tmp = list_entry(pos, switch_proc_handler, list);
list_del(pos);
remove_proc_entry(tmp->handler.name, tmp->parent);
kfree(tmp);
}
}
static void do_unregister(switch_driver *driver)
{
char buf[4];
int i;
switch_priv *priv = (switch_priv *) driver->data;
remove_handlers(priv);
for(i = 0; priv->ports[i] != NULL; i++) {
sprintf(buf, "%d", i);
remove_proc_entry(buf, priv->port_dir);
}
kfree(priv->ports);
remove_proc_entry("port", priv->driver_dir);
for(i = 0; priv->vlans[i] != NULL; i++) {
sprintf(buf, "%d", i);
remove_proc_entry(buf, priv->vlan_dir);
}
kfree(priv->vlans);
remove_proc_entry("vlan", priv->driver_dir);
remove_proc_entry(driver->interface, switch_root);
if (priv->nr == (drv_num - 1))
drv_num--;
kfree(priv);
}
switch_config global_driver_handlers[] = {
{"driver", handle_driver_name, NULL},
{"version", handle_driver_version, NULL},
{"cpuport", handle_driver_cpuport, NULL},
{"ports", handle_driver_ports, NULL},
{"vlans", handle_driver_vlans, NULL},
{"dev_name", handle_driver_dev_name, NULL},
{NULL, NULL, NULL}
};
static int do_register(switch_driver *driver)
{
switch_priv *priv;
int i;
char buf[4];
priv = kmalloc(sizeof(switch_priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
driver->data = (void *) priv;
priv->ports = kmalloc((driver->ports + 1) * sizeof(struct proc_dir_entry *),
GFP_KERNEL);
if (!priv->ports) {
kfree(priv);
return -ENOMEM;
}
priv->vlans = kmalloc((driver->vlans + 1) * sizeof(struct proc_dir_entry *),
GFP_KERNEL);
if (!priv->vlans) {
kfree(priv->ports);
kfree(priv);
return -ENOMEM;
}
INIT_LIST_HEAD(&priv->data.list);
priv->nr = drv_num++;
priv->driver_dir = proc_mkdir(driver->interface, switch_root);
if (driver->driver_handlers != NULL) {
add_handlers(driver, driver->driver_handlers, priv->driver_dir, 0);
add_handlers(driver, global_driver_handlers, priv->driver_dir, 0);
}
priv->port_dir = proc_mkdir("port", priv->driver_dir);
for (i = 0; i < driver->ports; i++) {
sprintf(buf, "%d", i);
priv->ports[i] = proc_mkdir(buf, priv->port_dir);
if (driver->port_handlers != NULL)
add_handlers(driver, driver->port_handlers, priv->ports[i], i);
}
priv->ports[i] = NULL;
priv->vlan_dir = proc_mkdir("vlan", priv->driver_dir);
for (i = 0; i < driver->vlans; i++) {
sprintf(buf, "%d", i);
priv->vlans[i] = proc_mkdir(buf, priv->vlan_dir);
if (driver->vlan_handlers != NULL)
add_handlers(driver, driver->vlan_handlers, priv->vlans[i], i);
}
priv->vlans[i] = NULL;
return 0;
}
static inline int isspace(char c) {
switch(c) {
case ' ':
case 0x09:
case 0x0a:
case 0x0d:
return 1;
default:
return 0;
}
}
#define toupper(c) (islower(c) ? ((c) ^ 0x20) : (c))
#define islower(c) (((unsigned char)((c) - 'a')) < 26)
int switch_parse_media(char *buf)
{
char *str = buf;
while (*buf != 0) {
*buf = toupper(*buf);
buf++;
}
if (strncmp(str, "AUTO", 4) == 0)
return SWITCH_MEDIA_AUTO;
else if (strncmp(str, "1000FD", 6) == 0)
return SWITCH_MEDIA_1000 | SWITCH_MEDIA_FD;
else if (strncmp(str, "1000HD", 6) == 0)
return SWITCH_MEDIA_1000;
else if (strncmp(str, "100FD", 5) == 0)
return SWITCH_MEDIA_100 | SWITCH_MEDIA_FD;
else if (strncmp(str, "100HD", 5) == 0)
return SWITCH_MEDIA_100;
else if (strncmp(str, "10FD", 4) == 0)
return SWITCH_MEDIA_FD;
else if (strncmp(str, "10HD", 4) == 0)
return 0;
else return -1;
}
int switch_print_media(char *buf, int media)
{
int len = 0;
if (media & SWITCH_MEDIA_AUTO)
len = sprintf(buf, "Auto");
else if (media == (SWITCH_MEDIA_1000 | SWITCH_MEDIA_FD))
len = sprintf(buf, "1000FD");
else if (media == SWITCH_MEDIA_1000)
len = sprintf(buf, "1000HD");
else if (media == (SWITCH_MEDIA_100 | SWITCH_MEDIA_FD))
len = sprintf(buf, "100FD");
else if (media == SWITCH_MEDIA_100)
len = sprintf(buf, "100HD");
else if (media == SWITCH_MEDIA_FD)
len = sprintf(buf, "10FD");
else if (media == 0)
len = sprintf(buf, "10HD");
else
len = sprintf(buf, "Invalid");
return len;
}
switch_vlan_config *switch_parse_vlan(switch_driver *driver, char *buf)
{
switch_vlan_config *c;
int j, u, p, s;
c = kzalloc(sizeof(switch_vlan_config), GFP_KERNEL);
if (!c)
return NULL;
while (isspace(*buf)) buf++;
j = 0;
while (*buf >= '0' && *buf <= '9') {
j *= 10;
j += *buf++ - '0';
u = ((j == driver->cpuport) ? 0 : 1);
p = 0;
s = !(*buf >= '0' && *buf <= '9');
if (s) {
while (s && !isspace(*buf) && (*buf != 0)) {
switch(*buf) {
case 'u':
u = 1;
break;
case 't':
u = 0;
break;
case '*':
p = 1;
break;
}
buf++;
}
c->port |= (1 << j);
if (u)
c->untag |= (1 << j);
if (p)
c->pvid |= (1 << j);
j = 0;
}
while (isspace(*buf)) buf++;
}
if (*buf != 0) {
kfree(c);
return NULL;
}
c->port &= (1 << driver->ports) - 1;
c->untag &= (1 << driver->ports) - 1;
c->pvid &= (1 << driver->ports) - 1;
return c;
}
int switch_device_registered (char* device) {
struct list_head *pos;
list_for_each(pos, &drivers.list) {
if (strcmp(list_entry(pos, switch_driver, list)->interface, device) == 0) {
printk("There is already a switch registered on the device '%s'\n", device);
return -EINVAL;
}
}
return 0;
}
int switch_register_driver(switch_driver *driver)
{
struct list_head *pos;
switch_driver *new;
int ret;
list_for_each(pos, &drivers.list) {
if (strcmp(list_entry(pos, switch_driver, list)->name, driver->name) == 0) {
printk("Switch driver '%s' already exists in the kernel\n", driver->name);
return -EINVAL;
}
if (strcmp(list_entry(pos, switch_driver, list)->interface, driver->interface) == 0) {
printk("There is already a switch registered on the device '%s'\n", driver->interface);
return -EINVAL;
}
}
new = kmalloc(sizeof(switch_driver), GFP_KERNEL);
if (!new)
return -ENOMEM;
memcpy(new, driver, sizeof(switch_driver));
new->name = strdup(driver->name);
new->interface = strdup(driver->interface);
if ((ret = do_register(new)) < 0) {
kfree(new->name);
kfree(new);
return ret;
}
INIT_LIST_HEAD(&new->list);
list_add(&new->list, &drivers.list);
return 0;
}
void switch_unregister_driver(char *name) {
struct list_head *pos, *q;
switch_driver *tmp;
list_for_each_safe(pos, q, &drivers.list) {
tmp = list_entry(pos, switch_driver, list);
if (strcmp(tmp->name, name) == 0) {
do_unregister(tmp);
list_del(pos);
kfree(tmp->name);
kfree(tmp);
return;
}
}
}
static int __init switch_init(void)
{
if ((switch_root = proc_mkdir("switch", NULL)) == NULL) {
printk("%s: proc_mkdir failed.\n", __FILE__);
return -ENODEV;
}
INIT_LIST_HEAD(&drivers.list);
return 0;
}
static void __exit switch_exit(void)
{
remove_proc_entry("switch", NULL);
}
MODULE_AUTHOR("Felix Fietkau <openwrt@nbd.name>");
MODULE_LICENSE("GPL");
EXPORT_SYMBOL(switch_device_registered);
EXPORT_SYMBOL(switch_register_driver);
EXPORT_SYMBOL(switch_unregister_driver);
EXPORT_SYMBOL(switch_parse_vlan);
EXPORT_SYMBOL(switch_parse_media);
EXPORT_SYMBOL(switch_print_media);
module_init(switch_init);
module_exit(switch_exit);

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package/kernel/switch/src/switch-core.h
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#ifndef __SWITCH_CORE_H
#define __SWITCH_CORE_H
#include <linux/version.h>
#include <linux/list.h>
#define SWITCH_MAX_BUFSZ 4096
#define SWITCH_NAME_BUFSZ 16
#define SWITCH_MEDIA_AUTO 1
#define SWITCH_MEDIA_100 2
#define SWITCH_MEDIA_FD 4
#define SWITCH_MEDIA_1000 8
typedef int (*switch_handler)(void *driver, char *buf, int nr);
typedef struct {
const char *name;
switch_handler read, write;
} switch_config;
typedef struct {
struct list_head list;
const char *name;
const char *version;
const char *interface;
int cpuport;
int ports;
int vlans;
const switch_config *driver_handlers, *port_handlers, *vlan_handlers;
void *data;
void *priv;
char dev_name[SWITCH_NAME_BUFSZ];
} switch_driver;
typedef struct {
u32 port, untag, pvid;
} switch_vlan_config;
extern int switch_device_registered (char* device);
extern int switch_register_driver(switch_driver *driver);
extern void switch_unregister_driver(char *name);
extern switch_vlan_config *switch_parse_vlan(switch_driver *driver, char *buf);
extern int switch_parse_media(char *buf);
extern int switch_print_media(char *buf, int media);
static inline char *strdup(const char *str)
{
char *new = kmalloc(strlen(str) + 1, GFP_KERNEL);
strcpy(new, str);
return new;
}
#endif

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package/kernel/switch/src/switch-robo.c
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/*
* Broadcom BCM5325E/536x switch configuration module
*
* Copyright (C) 2005 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2008 Michael Buesch <mb@bu3sch.de>
* Copyright (C) 2013 Hauke Mehrtens <hauke@hauke-m.de>
* Based on 'robocfg' by Oleg I. Vdovikin
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/if.h>
#include <linux/if_arp.h>
#include <linux/sockios.h>
#include <linux/ethtool.h>
#include <linux/mii.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <asm/uaccess.h>
#include "switch-core.h"
#include "etc53xx.h"
#ifdef CONFIG_BCM47XX
#include <bcm47xx_nvram.h>
#endif
#define DRIVER_NAME "bcm53xx"
#define DRIVER_VERSION "0.03"
#define PFX "roboswitch: "
#define ROBO_PHY_ADDR 0x1E /* robo switch phy address */
#define ROBO_PHY_ADDR_TG3 0x01 /* Tigon3 PHY address */
#define ROBO_PHY_ADDR_BCM63XX 0x00 /* BCM63XX PHY address */
/* MII registers */
#define REG_MII_PAGE 0x10 /* MII Page register */
#define REG_MII_ADDR 0x11 /* MII Address register */
#define REG_MII_DATA0 0x18 /* MII Data register 0 */
#define REG_MII_PAGE_ENABLE 1
#define REG_MII_ADDR_WRITE 1
#define REG_MII_ADDR_READ 2
/* Robo device ID register (in ROBO_MGMT_PAGE) */
#define ROBO_DEVICE_ID 0x30
#define ROBO_DEVICE_ID_5325 0x25 /* Faked */
#define ROBO_DEVICE_ID_5395 0x95
#define ROBO_DEVICE_ID_5397 0x97
#define ROBO_DEVICE_ID_5398 0x98
#define ROBO_DEVICE_ID_53115 0x3115
#define ROBO_DEVICE_ID_53125 0x3125
/* Private et.o ioctls */
#define SIOCGETCPHYRD (SIOCDEVPRIVATE + 9)
#define SIOCSETCPHYWR (SIOCDEVPRIVATE + 10)
/* Data structure for a Roboswitch device. */
struct robo_switch {
char *device; /* The device name string (ethX) */
u16 devid; /* ROBO_DEVICE_ID_53xx */
bool is_5365;
bool gmii; /* gigabit mii */
u8 corerev;
int gpio_robo_reset;
int gpio_lanports_enable;
struct ifreq ifr;
struct net_device *dev;
unsigned char port[9];
};
/* Currently we can only have one device in the system. */
static struct robo_switch robo;
static int do_ioctl(int cmd)
{
mm_segment_t old_fs = get_fs();
int ret;
set_fs(KERNEL_DS);
ret = robo.dev->netdev_ops->ndo_do_ioctl(robo.dev, &robo.ifr, cmd);
set_fs(old_fs);
return ret;
}
static u16 mdio_read(__u16 phy_id, __u8 reg)
{
struct mii_ioctl_data *mii = if_mii(&robo.ifr);
int err;
mii->phy_id = phy_id;
mii->reg_num = reg;
err = do_ioctl(SIOCGMIIREG);
if (err < 0) {
printk(KERN_ERR PFX "failed to read mdio reg %i with err %i.\n", reg, err);
return 0xffff;
}
return mii->val_out;
}
static void mdio_write(__u16 phy_id, __u8 reg, __u16 val)
{
struct mii_ioctl_data *mii = if_mii(&robo.ifr);
int err;
mii->phy_id = phy_id;
mii->reg_num = reg;
mii->val_in = val;
err = do_ioctl(SIOCSMIIREG);
if (err < 0) {
printk(KERN_ERR PFX "failed to write mdio reg: %i with err %i.\n", reg, err);
return;
}
}
static int robo_reg(__u8 page, __u8 reg, __u8 op)
{
int i = 3;
/* set page number */
mdio_write(ROBO_PHY_ADDR, REG_MII_PAGE,
(page << 8) | REG_MII_PAGE_ENABLE);
/* set register address */
mdio_write(ROBO_PHY_ADDR, REG_MII_ADDR,
(reg << 8) | op);
/* check if operation completed */
while (i--) {
if ((mdio_read(ROBO_PHY_ADDR, REG_MII_ADDR) & 3) == 0)
return 0;
}
printk(KERN_ERR PFX "timeout in robo_reg on page %i and reg %i with op %i.\n", page, reg, op);
return 1;
}
/*
static void robo_read(__u8 page, __u8 reg, __u16 *val, int count)
{
int i;
robo_reg(page, reg, REG_MII_ADDR_READ);
for (i = 0; i < count; i++)
val[i] = mdio_read(ROBO_PHY_ADDR, REG_MII_DATA0 + i);
}
*/
static __u16 robo_read16(__u8 page, __u8 reg)
{
robo_reg(page, reg, REG_MII_ADDR_READ);
return mdio_read(ROBO_PHY_ADDR, REG_MII_DATA0);
}
static __u32 robo_read32(__u8 page, __u8 reg)
{
robo_reg(page, reg, REG_MII_ADDR_READ);
return mdio_read(ROBO_PHY_ADDR, REG_MII_DATA0) |
(mdio_read(ROBO_PHY_ADDR, REG_MII_DATA0 + 1) << 16);
}
static void robo_write16(__u8 page, __u8 reg, __u16 val16)
{
/* write data */
mdio_write(ROBO_PHY_ADDR, REG_MII_DATA0, val16);
robo_reg(page, reg, REG_MII_ADDR_WRITE);
}
static void robo_write32(__u8 page, __u8 reg, __u32 val32)
{
/* write data */
mdio_write(ROBO_PHY_ADDR, REG_MII_DATA0, val32 & 0xFFFF);
mdio_write(ROBO_PHY_ADDR, REG_MII_DATA0 + 1, val32 >> 16);
robo_reg(page, reg, REG_MII_ADDR_WRITE);
}
/* checks that attached switch is 5365 */
static bool robo_bcm5365(void)
{
/* set vlan access id to 15 and read it back */
__u16 val16 = 15;
robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS, val16);
/* 5365 will refuse this as it does not have this reg */
return robo_read16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS) != val16;
}
static bool robo_gmii(void)
{
if (mdio_read(0, ROBO_MII_STAT) & 0x0100)
return ((mdio_read(0, 0x0f) & 0xf000) != 0);
return false;
}
static int robo_switch_enable(void)
{
unsigned int i, last_port;
u16 val;
#ifdef CONFIG_BCM47XX
char buf[20];
#endif
val = robo_read16(ROBO_CTRL_PAGE, ROBO_SWITCH_MODE);
if (!(val & (1 << 1))) {
/* Unmanaged mode */
val &= ~(1 << 0);
/* With forwarding */
val |= (1 << 1);
robo_write16(ROBO_CTRL_PAGE, ROBO_SWITCH_MODE, val);
val = robo_read16(ROBO_CTRL_PAGE, ROBO_SWITCH_MODE);
if (!(val & (1 << 1))) {
printk(KERN_ERR PFX "Failed to enable switch\n");
return -EBUSY;
}
/* No spanning tree for unmanaged mode */
last_port = (robo.devid == ROBO_DEVICE_ID_5398) ?
ROBO_PORT7_CTRL : ROBO_PORT4_CTRL;
for (i = ROBO_PORT0_CTRL; i <= last_port; i++)
robo_write16(ROBO_CTRL_PAGE, i, 0);
/* No spanning tree on IMP port too */
robo_write16(ROBO_CTRL_PAGE, ROBO_IM_PORT_CTRL, 0);
}
if (robo.devid == ROBO_DEVICE_ID_53125) {
/* Make IM port status link by default */
val = robo_read16(ROBO_CTRL_PAGE, ROBO_PORT_OVERRIDE_CTRL) | 0xb1;
robo_write16(ROBO_CTRL_PAGE, ROBO_PORT_OVERRIDE_CTRL, val);
// TODO: init EEE feature
}
#ifdef CONFIG_BCM47XX
/* WAN port LED, except for Netgear WGT634U */
if (bcm47xx_nvram_getenv("nvram_type", buf, sizeof(buf)) >= 0) {
if (strcmp(buf, "cfe") != 0)
robo_write16(ROBO_CTRL_PAGE, 0x16, 0x1F);
}
#endif
return 0;
}
static void robo_switch_reset(void)
{
if ((robo.devid == ROBO_DEVICE_ID_5395) ||
(robo.devid == ROBO_DEVICE_ID_5397) ||
(robo.devid == ROBO_DEVICE_ID_5398)) {
/* Trigger a software reset. */
robo_write16(ROBO_CTRL_PAGE, 0x79, 0x83);
mdelay(500);
robo_write16(ROBO_CTRL_PAGE, 0x79, 0);
}
}
#ifdef CONFIG_BCM47XX
static int get_gpio_pin(const char *name)
{
int i, err;
char nvram_var[10];
char buf[30];
for (i = 0; i < 16; i++) {
err = snprintf(nvram_var, sizeof(nvram_var), "gpio%i", i);
if (err <= 0)
continue;
err = bcm47xx_nvram_getenv(nvram_var, buf, sizeof(buf));
if (err <= 0)
continue;
if (!strcmp(name, buf))
return i;
}
return -1;
}
#endif
static int robo_probe(char *devname)
{
__u32 phyid;
unsigned int i;
int err = -1;
struct mii_ioctl_data *mii;
printk(KERN_INFO PFX "Probing device '%s'\n", devname);
strcpy(robo.ifr.ifr_name, devname);
if ((robo.dev = dev_get_by_name(&init_net, devname)) == NULL) {
printk(KERN_ERR PFX "No such device\n");
err = -ENODEV;
goto err_done;
}
if (!robo.dev->netdev_ops || !robo.dev->netdev_ops->ndo_do_ioctl) {
printk(KERN_ERR PFX "ndo_do_ioctl not implemented in ethernet driver\n");
err = -ENXIO;
goto err_put;
}
robo.device = devname;
/* try access using MII ioctls - get phy address */
err = do_ioctl(SIOCGMIIPHY);
if (err < 0) {
printk(KERN_ERR PFX "error (%i) while accessing MII phy registers with ioctls\n", err);
goto err_put;
}
/* got phy address check for robo address */
mii = if_mii(&robo.ifr);
if ((mii->phy_id != ROBO_PHY_ADDR) &&
(mii->phy_id != ROBO_PHY_ADDR_BCM63XX) &&
(mii->phy_id != ROBO_PHY_ADDR_TG3)) {
printk(KERN_ERR PFX "Invalid phy address (%d)\n", mii->phy_id);
err = -ENODEV;
goto err_put;
}
#ifdef CONFIG_BCM47XX
robo.gpio_lanports_enable = get_gpio_pin("lanports_enable");
if (robo.gpio_lanports_enable >= 0) {
err = gpio_request(robo.gpio_lanports_enable, "lanports_enable");
if (err) {
printk(KERN_ERR PFX "error (%i) requesting lanports_enable gpio (%i)\n",
err, robo.gpio_lanports_enable);
goto err_put;
}
gpio_direction_output(robo.gpio_lanports_enable, 1);
mdelay(5);
}
robo.gpio_robo_reset = get_gpio_pin("robo_reset");
if (robo.gpio_robo_reset >= 0) {
err = gpio_request(robo.gpio_robo_reset, "robo_reset");
if (err) {
printk(KERN_ERR PFX "error (%i) requesting robo_reset gpio (%i)\n",
err, robo.gpio_robo_reset);
goto err_gpio_robo;
}
gpio_set_value(robo.gpio_robo_reset, 0);
gpio_direction_output(robo.gpio_robo_reset, 1);
gpio_set_value(robo.gpio_robo_reset, 0);
mdelay(50);
gpio_set_value(robo.gpio_robo_reset, 1);
mdelay(20);
} else {
// TODO: reset the internal robo switch
}
#endif
phyid = mdio_read(ROBO_PHY_ADDR, 0x2) |
(mdio_read(ROBO_PHY_ADDR, 0x3) << 16);
if (phyid == 0xffffffff || phyid == 0x55210022) {
printk(KERN_ERR PFX "No Robo switch in managed mode found, phy_id = 0x%08x\n", phyid);
err = -ENODEV;
goto err_gpio_lanports;
}
/* Get the device ID */
for (i = 0; i < 10; i++) {
robo.devid = robo_read16(ROBO_MGMT_PAGE, ROBO_DEVICE_ID);
if (robo.devid)
break;
udelay(10);
}
if (!robo.devid)
robo.devid = ROBO_DEVICE_ID_5325; /* Fake it */
if (robo.devid == ROBO_DEVICE_ID_5325)
robo.is_5365 = robo_bcm5365();
else
robo.is_5365 = false;
robo.gmii = robo_gmii();
if (robo.devid == ROBO_DEVICE_ID_5325) {
for (i = 0; i < 5; i++)
robo.port[i] = i;
} else {
for (i = 0; i < 8; i++)
robo.port[i] = i;
}
robo.port[i] = ROBO_IM_PORT_CTRL;
robo_switch_reset();
err = robo_switch_enable();
if (err)
goto err_gpio_lanports;
printk(KERN_INFO PFX "found a 5%s%x!%s at %s\n", robo.devid & 0xff00 ? "" : "3", robo.devid,
robo.is_5365 ? " It's a BCM5365." : "", devname);
return 0;
err_gpio_lanports:
if (robo.gpio_lanports_enable >= 0)
gpio_free(robo.gpio_lanports_enable);
err_gpio_robo:
if (robo.gpio_robo_reset >= 0)
gpio_free(robo.gpio_robo_reset);
err_put:
dev_put(robo.dev);
robo.dev = NULL;
err_done:
return err;
}
static int handle_vlan_port_read_old(switch_driver *d, char *buf, int nr)
{
__u16 val16;
int len = 0;
int j;
val16 = (nr) /* vlan */ | (0 << 12) /* read */ | (1 << 13) /* enable */;
if (robo.is_5365) {
robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS_5365, val16);
/* actual read */
val16 = robo_read16(ROBO_VLAN_PAGE, ROBO_VLAN_READ);
if ((val16 & (1 << 14)) /* valid */) {
for (j = 0; j < d->ports; j++) {
if (val16 & (1 << j)) {
len += sprintf(buf + len, "%d", j);
if (val16 & (1 << (j + 7))) {
if (j == d->cpuport)
buf[len++] = 'u';
} else {
buf[len++] = 't';
if (robo_read16(ROBO_VLAN_PAGE, ROBO_VLAN_PORT0_DEF_TAG + (j << 1)) == nr)
buf[len++] = '*';
}
buf[len++] = '\t';
}
}
len += sprintf(buf + len, "\n");
}
} else {
u32 val32;
robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS, val16);
/* actual read */
val32 = robo_read32(ROBO_VLAN_PAGE, ROBO_VLAN_READ);
if ((val32 & (1 << 20)) /* valid */) {
for (j = 0; j < d->ports; j++) {
if (val32 & (1 << j)) {
len += sprintf(buf + len, "%d", j);
if (val32 & (1 << (j + d->ports))) {
if (j == d->cpuport)
buf[len++] = 'u';
} else {
buf[len++] = 't';
if (robo_read16(ROBO_VLAN_PAGE, ROBO_VLAN_PORT0_DEF_TAG + (j << 1)) == nr)
buf[len++] = '*';
}
buf[len++] = '\t';
}
}
len += sprintf(buf + len, "\n");
}
}
buf[len] = '\0';
return len;
}
static int handle_vlan_port_read_new(switch_driver *d, char *buf, int nr)
{
__u8 vtbl_entry, vtbl_index, vtbl_access;
__u32 val32;
int len = 0;
int j;
if ((robo.devid == ROBO_DEVICE_ID_5395) ||
(robo.devid == ROBO_DEVICE_ID_53115) ||
(robo.devid == ROBO_DEVICE_ID_53125)) {
vtbl_access = ROBO_VTBL_ACCESS_5395;
vtbl_index = ROBO_VTBL_INDX_5395;
vtbl_entry = ROBO_VTBL_ENTRY_5395;
} else {
vtbl_access = ROBO_VTBL_ACCESS;
vtbl_index = ROBO_VTBL_INDX;
vtbl_entry = ROBO_VTBL_ENTRY;
}
robo_write16(ROBO_ARLIO_PAGE, vtbl_index, nr);
robo_write16(ROBO_ARLIO_PAGE, vtbl_access, (1 << 7) | (1 << 0));
val32 = robo_read32(ROBO_ARLIO_PAGE, vtbl_entry);
for (j = 0; j < d->ports; j++) {
if (val32 & (1 << j)) {
len += sprintf(buf + len, "%d", j);
if (val32 & (1 << (j + d->ports))) {
if (j == d->cpuport)
buf[len++] = 'u';
} else {
buf[len++] = 't';
if (robo_read16(ROBO_VLAN_PAGE, ROBO_VLAN_PORT0_DEF_TAG + (j << 1)) == nr)
buf[len++] = '*';
}
buf[len++] = '\t';
}
}
len += sprintf(buf + len, "\n");
buf[len] = '\0';
return len;
}
static int handle_vlan_port_read(void *driver, char *buf, int nr)
{
switch_driver *d = (switch_driver *) driver;
if (robo.devid != ROBO_DEVICE_ID_5325)
return handle_vlan_port_read_new(d, buf, nr);
else
return handle_vlan_port_read_old(d, buf, nr);
}
static void handle_vlan_port_write_old(switch_driver *d, switch_vlan_config *c, int nr)
{
__u16 val16;
__u32 val32;
__u32 untag = ((c->untag & ~(1 << d->cpuport)) << d->ports);
/* write config now */
val16 = (nr) /* vlan */ | (1 << 12) /* write */ | (1 << 13) /* enable */;
if (robo.is_5365) {
robo_write32(ROBO_VLAN_PAGE, ROBO_VLAN_WRITE_5365,
(1 << 14) /* valid */ | (untag << 1 ) | c->port);
robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS_5365, val16);
} else {
if (robo.corerev < 3)
val32 = (1 << 20) | ((nr >> 4) << 12) | untag | c->port;
else
val32 = (1 << 24) | (nr << 12) | untag | c->port;
robo_write32(ROBO_VLAN_PAGE, ROBO_VLAN_WRITE, val32);
robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS, val16);
}
}
static void handle_vlan_port_write_new(switch_driver *d, switch_vlan_config *c, int nr)
{
__u8 vtbl_entry, vtbl_index, vtbl_access;
__u32 untag = ((c->untag & ~(1 << d->cpuport)) << d->ports);
/* write config now */
if ((robo.devid == ROBO_DEVICE_ID_5395) ||
(robo.devid == ROBO_DEVICE_ID_53115) ||
(robo.devid == ROBO_DEVICE_ID_53125)) {
vtbl_access = ROBO_VTBL_ACCESS_5395;
vtbl_index = ROBO_VTBL_INDX_5395;
vtbl_entry = ROBO_VTBL_ENTRY_5395;
} else {
vtbl_access = ROBO_VTBL_ACCESS;
vtbl_index = ROBO_VTBL_INDX;
vtbl_entry = ROBO_VTBL_ENTRY;
}
robo_write32(ROBO_ARLIO_PAGE, vtbl_entry, untag | c->port);
robo_write16(ROBO_ARLIO_PAGE, vtbl_index, nr);
robo_write16(ROBO_ARLIO_PAGE, vtbl_access, 1 << 7);
}
static int handle_vlan_port_write(void *driver, char *buf, int nr)
{
switch_driver *d = (switch_driver *)driver;
switch_vlan_config *c = switch_parse_vlan(d, buf);
int j;
if (c == NULL)
return -EINVAL;
for (j = 0; j < d->ports; j++) {
if ((c->untag | c->pvid) & (1 << j)) {
/* change default vlan tag */
robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_PORT0_DEF_TAG + (j << 1), nr);
}
}
if (robo.devid != ROBO_DEVICE_ID_5325)
handle_vlan_port_write_new(d, c, nr);
else
handle_vlan_port_write_old(d, c, nr);
kfree(c);
return 0;
}
#define set_switch(state) \
robo_write16(ROBO_CTRL_PAGE, ROBO_SWITCH_MODE, (robo_read16(ROBO_CTRL_PAGE, ROBO_SWITCH_MODE) & ~2) | (state ? 2 : 0));
static int handle_enable_read(void *driver, char *buf, int nr)
{
return sprintf(buf, "%d\n", (((robo_read16(ROBO_CTRL_PAGE, ROBO_SWITCH_MODE) & 2) == 2) ? 1 : 0));
}
static int handle_enable_write(void *driver, char *buf, int nr)
{
set_switch(buf[0] == '1');
return 0;
}
static int handle_port_enable_read(void *driver, char *buf, int nr)
{
return sprintf(buf, "%d\n", ((robo_read16(ROBO_CTRL_PAGE, robo.port[nr]) & 3) == 3 ? 0 : 1));
}
static int handle_port_enable_write(void *driver, char *buf, int nr)
{
u16 val16;
if (buf[0] == '0')
val16 = 3; /* disabled */
else if (buf[0] == '1')
val16 = 0; /* enabled */
else
return -EINVAL;
robo_write16(ROBO_CTRL_PAGE, robo.port[nr],
(robo_read16(ROBO_CTRL_PAGE, robo.port[nr]) & ~3) | val16);
return 0;
}
static int handle_port_media_read(void *driver, char *buf, int nr)
{
u16 bmcr = mdio_read(robo.port[nr], MII_BMCR);
int media, len;
if (bmcr & BMCR_ANENABLE)
media = SWITCH_MEDIA_AUTO;
else {
if (bmcr & BMCR_SPEED1000)
media = SWITCH_MEDIA_1000;
else if (bmcr & BMCR_SPEED100)
media = SWITCH_MEDIA_100;
else
media = 0;
if (bmcr & BMCR_FULLDPLX)
media |= SWITCH_MEDIA_FD;
}
len = switch_print_media(buf, media);
return len + sprintf(buf + len, "\n");
}
static int handle_port_media_write(void *driver, char *buf, int nr)
{
int media = switch_parse_media(buf);
u16 bmcr, bmcr_mask;
if (media & SWITCH_MEDIA_AUTO)
bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
else {
if (media & SWITCH_MEDIA_1000) {
if (!robo.gmii)
return -EINVAL;
bmcr = BMCR_SPEED1000;
}
else if (media & SWITCH_MEDIA_100)
bmcr = BMCR_SPEED100;
else
bmcr = 0;
if (media & SWITCH_MEDIA_FD)
bmcr |= BMCR_FULLDPLX;
}
bmcr_mask = ~(BMCR_SPEED1000 | BMCR_SPEED100 | BMCR_FULLDPLX | BMCR_ANENABLE | BMCR_ANRESTART);
mdio_write(robo.port[nr], MII_BMCR,
(mdio_read(robo.port[nr], MII_BMCR) & bmcr_mask) | bmcr);
return 0;
}
static int handle_enable_vlan_read(void *driver, char *buf, int nr)
{
return sprintf(buf, "%d\n", (((robo_read16(ROBO_VLAN_PAGE, ROBO_VLAN_CTRL0) & (1 << 7)) == (1 << 7)) ? 1 : 0));
}
static int handle_enable_vlan_write(void *driver, char *buf, int nr)
{
__u16 val16;
int disable = ((buf[0] != '1') ? 1 : 0);
val16 = robo_read16(ROBO_VLAN_PAGE, ROBO_VLAN_CTRL0);
robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_CTRL0, disable ? 0 :
val16 | (1 << 7) /* 802.1Q VLAN */ | (3 << 5) /* mac check and hash */);
val16 = robo_read16(ROBO_VLAN_PAGE, ROBO_VLAN_CTRL1);
robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_CTRL1, disable ? 0 :
val16 | (robo.devid == ROBO_DEVICE_ID_5325 ? (1 << 1) :
0) | (1 << 2) | (1 << 3)); /* RSV multicast */
if (robo.devid != ROBO_DEVICE_ID_5325)
return 0;
robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_CTRL4, disable ? 0 :
(1 << 6) /* drop invalid VID frames */);
robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_CTRL5, disable ? 0 :
(1 << 3) /* drop miss V table frames */);
return 0;
}
static void handle_reset_old(switch_driver *d, char *buf, int nr)
{
int j;
__u16 val16;
/* reset vlans */
for (j = 0; j <= ((robo.is_5365) ? VLAN_ID_MAX_5365 : VLAN_ID_MAX); j++) {
/* write config now */
val16 = (j) /* vlan */ | (1 << 12) /* write */ | (1 << 13) /* enable */;
if (robo.is_5365)
robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_WRITE_5365, 0);
else
robo_write32(ROBO_VLAN_PAGE, ROBO_VLAN_WRITE, 0);
robo_write16(ROBO_VLAN_PAGE, robo.is_5365 ? ROBO_VLAN_TABLE_ACCESS_5365 :
ROBO_VLAN_TABLE_ACCESS,
val16);
}
}
static void handle_reset_new(switch_driver *d, char *buf, int nr)
{
int j;
__u8 vtbl_entry, vtbl_index, vtbl_access;
if ((robo.devid == ROBO_DEVICE_ID_5395) ||
(robo.devid == ROBO_DEVICE_ID_53115) ||
(robo.devid == ROBO_DEVICE_ID_53125)) {
vtbl_access = ROBO_VTBL_ACCESS_5395;
vtbl_index = ROBO_VTBL_INDX_5395;
vtbl_entry = ROBO_VTBL_ENTRY_5395;
} else {
vtbl_access = ROBO_VTBL_ACCESS;
vtbl_index = ROBO_VTBL_INDX;
vtbl_entry = ROBO_VTBL_ENTRY;
}
for (j = 0; j <= VLAN_ID_MAX; j++) {
/* write config now */
robo_write32(ROBO_ARLIO_PAGE, vtbl_entry, 0);
robo_write16(ROBO_ARLIO_PAGE, vtbl_index, j);
robo_write16(ROBO_ARLIO_PAGE, vtbl_access, 1 << 7);
}
}
static int handle_reset(void *driver, char *buf, int nr)
{
int j;
switch_driver *d = (switch_driver *) driver;
/* disable switching */
set_switch(0);
if (robo.devid != ROBO_DEVICE_ID_5325)
handle_reset_new(d, buf, nr);
else
handle_reset_old(d, buf, nr);
/* reset ports to a known good state */
for (j = 0; j < d->ports; j++) {
robo_write16(ROBO_CTRL_PAGE, robo.port[j], 0x0000);
robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_PORT0_DEF_TAG + (j << 1), 0);
}
/* enable switching */
set_switch(1);
/* enable vlans */
handle_enable_vlan_write(driver, "1", 0);
return 0;
}
static int __init robo_init(void)
{
int notfound = 1;
char *device;
device = strdup("ethX");
for (device[3] = '0'; (device[3] <= '3') && notfound; device[3]++) {
if (! switch_device_registered (device))
notfound = robo_probe(device);
}
device[3]--;
if (notfound) {
kfree(device);
return -ENODEV;
} else {
static const switch_config cfg[] = {
{
.name = "enable",
.read = handle_enable_read,
.write = handle_enable_write
}, {
.name = "enable_vlan",
.read = handle_enable_vlan_read,
.write = handle_enable_vlan_write
}, {
.name = "reset",
.read = NULL,
.write = handle_reset
}, { NULL, },
};
static const switch_config port[] = {
{
.name = "enable",
.read = handle_port_enable_read,
.write = handle_port_enable_write
}, {
.name = "media",
.read = handle_port_media_read,
.write = handle_port_media_write
}, { NULL, },
};
static const switch_config vlan[] = {
{
.name = "ports",
.read = handle_vlan_port_read,
.write = handle_vlan_port_write
}, { NULL, },
};
switch_driver driver = {
.name = DRIVER_NAME,
.version = DRIVER_VERSION,
.interface = device,
.cpuport = 5,
.ports = 6,
.vlans = 16,
.driver_handlers = cfg,
.port_handlers = port,
.vlan_handlers = vlan,
};
if (robo.devid != ROBO_DEVICE_ID_5325) {
driver.ports = 9;
driver.cpuport = 8;
}
if (robo.is_5365)
snprintf(driver.dev_name, SWITCH_NAME_BUFSZ, "BCM5365");
else
snprintf(driver.dev_name, SWITCH_NAME_BUFSZ, "BCM5%s%x", robo.devid & 0xff00 ? "" : "3", robo.devid);
return switch_register_driver(&driver);
}
}
static void __exit robo_exit(void)
{
switch_unregister_driver(DRIVER_NAME);
if (robo.dev)
dev_put(robo.dev);
if (robo.gpio_robo_reset >= 0)
gpio_free(robo.gpio_robo_reset);
if (robo.gpio_lanports_enable >= 0)
gpio_free(robo.gpio_lanports_enable);
kfree(robo.device);
}
MODULE_AUTHOR("Felix Fietkau <openwrt@nbd.name>");
MODULE_LICENSE("GPL");
module_init(robo_init);
module_exit(robo_exit);

2
package/network/config/swconfig/Makefile
Unescape Escape View File

@ -18,7 +18,7 @@ include $(INCLUDE_DIR)/kernel.mk
define Package/swconfig
SECTION:=base
CATEGORY:=Base system
DEPENDS:=@(!TARGET_brcm47xx||LINUX_3_10) +libuci +libnl-tiny
DEPENDS:=+libuci +libnl-tiny
TITLE:=Switch configuration utility
endef

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