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@ -26,7 +26,7 @@
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#endif
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#define RTL8366S_DRIVER_DESC "Realtek RTL8366RB ethernet switch driver"
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#define RTL8366S_DRIVER_VER "0.2.0"
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#define RTL8366S_DRIVER_VER "0.2.2"
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#define RTL8366S_PHY_NO_MAX 4
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#define RTL8366S_PHY_PAGE_MAX 7
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@ -1573,14 +1573,25 @@ static int rtl8366rb_mii_bus_match(struct mii_bus *bus)
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static int rtl8366rb_setup(struct rtl8366rb *rtl)
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{
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struct rtl8366_smi *smi = &rtl->smi;
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int ret;
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ret = rtl8366rb_reset_chip(rtl);
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if (ret)
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return ret;
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rtl8366rb_debugfs_init(rtl);
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return 0;
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}
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static int rtl8366rb_detect(struct rtl8366_smi *smi)
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{
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u32 chip_id = 0;
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u32 chip_ver = 0;
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int ret;
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ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_ID_REG, &chip_id);
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if (ret) {
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dev_err(rtl->parent, "unable to read chip id\n");
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dev_err(smi->parent, "unable to read chip id\n");
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return ret;
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}
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@ -1588,28 +1599,27 @@ static int rtl8366rb_setup(struct rtl8366rb *rtl)
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case RTL8366S_CHIP_ID_8366:
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break;
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default:
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dev_err(rtl->parent, "unknown chip id (%04x)\n", chip_id);
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dev_err(smi->parent, "unknown chip id (%04x)\n", chip_id);
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return -ENODEV;
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}
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ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_VERSION_CTRL_REG,
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&chip_ver);
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if (ret) {
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dev_err(rtl->parent, "unable to read chip version\n");
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dev_err(smi->parent, "unable to read chip version\n");
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return ret;
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}
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dev_info(rtl->parent, "RTL%04x ver. %u chip found\n",
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dev_info(smi->parent, "RTL%04x ver. %u chip found\n",
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chip_id, chip_ver & RTL8366S_CHIP_VERSION_MASK);
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ret = rtl8366rb_reset_chip(rtl);
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if (ret)
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return ret;
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rtl8366rb_debugfs_init(rtl);
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return 0;
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}
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static struct rtl8366_smi_ops rtl8366rb_smi_ops = {
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.detect = rtl8366rb_detect,
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};
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static int __init rtl8366rb_probe(struct platform_device *pdev)
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{
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static int rtl8366_smi_version_printed;
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@ -1642,6 +1652,7 @@ static int __init rtl8366rb_probe(struct platform_device *pdev)
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smi->parent = &pdev->dev;
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smi->gpio_sda = pdata->gpio_sda;
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smi->gpio_sck = pdata->gpio_sck;
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smi->ops = &rtl8366rb_smi_ops;
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err = rtl8366_smi_init(smi);
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if (err)
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