brcm47xx: 3.10: backport MIPS patches for early HIGHMEM support

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>

SVN-Revision: 42052
v19.07.3_mercusys_ac12_duma
Hauke Mehrtens 10 years ago
parent 517ad9ff0d
commit dc38211cff

@ -0,0 +1,50 @@
From c949c0bc55571209fe6742f645b1e2eb20099591 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Date: Tue, 17 Jun 2014 16:36:50 +0200
Subject: [PATCH 149/150] MIPS: BCM47XX: Move shared symbols to the config
BCM47XX
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: https://patchwork.linux-mips.org/patch/7100/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
arch/mips/Kconfig | 2 ++
arch/mips/bcm47xx/Kconfig | 4 ----
2 files changed, 2 insertions(+), 4 deletions(-)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -119,6 +119,8 @@ config BCM47XX
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_HAS_EARLY_PRINTK
select EARLY_PRINTK_8250 if EARLY_PRINTK
+ select GPIOLIB
+ select LEDS_GPIO_REGISTER
help
Support for BCM47XX based boards
--- a/arch/mips/bcm47xx/Kconfig
+++ b/arch/mips/bcm47xx/Kconfig
@@ -11,8 +11,6 @@ config BCM47XX_SSB
select SSB_DRIVER_PCICORE if PCI
select SSB_PCICORE_HOSTMODE if PCI
select SSB_DRIVER_GPIO
- select GPIOLIB
- select LEDS_GPIO_REGISTER
default y
help
Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support.
@@ -29,8 +27,6 @@ config BCM47XX_BCMA
select BCMA_HOST_PCI if PCI
select BCMA_DRIVER_PCI_HOSTMODE if PCI
select BCMA_DRIVER_GPIO
- select GPIOLIB
- select LEDS_GPIO_REGISTER
default y
help
Add support for new Broadcom BCM47xx boards with Broadcom specific Advanced Microcontroller Bus.

@ -0,0 +1,32 @@
From ce01cbef8b0b71d01f8a68cba59da3198165bae6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Date: Tue, 17 Jun 2014 16:36:51 +0200
Subject: [PATCH 150/150] MIPS: BCM47XX: Select SYS_SUPPORTS_HIGHMEM for
BCM47XX_BCMA
MIME-Version: 1.0
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Content-Transfer-Encoding: 8bit
It seems that bcm47xx can handle only 128 MiB of RAM directly. There
are few devices with 256 MiB, but Broadcom's SDK uses highmem to handle
anything above 128 MiB.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: https://patchwork.linux-mips.org/patch/7101/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
arch/mips/bcm47xx/Kconfig | 1 +
1 file changed, 1 insertion(+)
--- a/arch/mips/bcm47xx/Kconfig
+++ b/arch/mips/bcm47xx/Kconfig
@@ -20,6 +20,7 @@ config BCM47XX_SSB
config BCM47XX_BCMA
bool "BCMA Support for Broadcom BCM47XX"
select SYS_HAS_CPU_MIPS32_R2
+ select SYS_SUPPORTS_HIGHMEM
select CPU_MIPSR2_IRQ_VI
select BCMA
select BCMA_HOST_SOC

@ -0,0 +1,107 @@
From d377732c8c9aac14ccb900b65678558b0fb8f0f3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Date: Thu, 17 Jul 2014 23:26:32 +0200
Subject: [PATCH 152/153] Revert "MIPS: Delete unused function
add_temporary_entry."
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This reverts commit d7a887a73dec6c387b02a966a71aac767bbd9ce6.
Function add_temporary_entry is needed by bcm47xx to support highmem. We
need to add a temporary entry to check for amount of RAM.
The only change made in this revert was replacing (ENTER|EXIT)_CRITICAL.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: https://patchwork.linux-mips.org/patch/7395/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
arch/mips/include/asm/pgtable-32.h | 10 ++++++++
arch/mips/mm/tlb-r4k.c | 47 ++++++++++++++++++++++++++++++++++++++
2 files changed, 57 insertions(+)
--- a/arch/mips/include/asm/pgtable-32.h
+++ b/arch/mips/include/asm/pgtable-32.h
@@ -19,6 +19,16 @@
#include <asm-generic/pgtable-nopmd.h>
/*
+ * - add_temporary_entry() add a temporary TLB entry. We use TLB entries
+ * starting at the top and working down. This is for populating the
+ * TLB before trap_init() puts the TLB miss handler in place. It
+ * should be used only for entries matching the actual page tables,
+ * to prevent inconsistencies.
+ */
+extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
+ unsigned long entryhi, unsigned long pagemask);
+
+/*
* Basically we have the same two-level (which is the logical three level
* Linux page table layout folded) page tables as the i386. Some day
* when we have proper page coloring support we can have a 1% quicker
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -389,6 +389,51 @@ int __init has_transparent_hugepage(void
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
+/*
+ * Used for loading TLB entries before trap_init() has started, when we
+ * don't actually want to add a wired entry which remains throughout the
+ * lifetime of the system
+ */
+
+static int temp_tlb_entry __cpuinitdata;
+
+__init int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
+ unsigned long entryhi, unsigned long pagemask)
+{
+ int ret = 0;
+ unsigned long flags;
+ unsigned long wired;
+ unsigned long old_pagemask;
+ unsigned long old_ctx;
+
+ local_irq_save(flags);
+ /* Save old context and create impossible VPN2 value */
+ old_ctx = read_c0_entryhi();
+ old_pagemask = read_c0_pagemask();
+ wired = read_c0_wired();
+ if (--temp_tlb_entry < wired) {
+ printk(KERN_WARNING
+ "No TLB space left for add_temporary_entry\n");
+ ret = -ENOSPC;
+ goto out;
+ }
+
+ write_c0_index(temp_tlb_entry);
+ write_c0_pagemask(pagemask);
+ write_c0_entryhi(entryhi);
+ write_c0_entrylo0(entrylo0);
+ write_c0_entrylo1(entrylo1);
+ mtc0_tlbw_hazard();
+ tlb_write_indexed();
+ tlbw_use_hazard();
+
+ write_c0_entryhi(old_ctx);
+ write_c0_pagemask(old_pagemask);
+out:
+ local_irq_restore(flags);
+ return ret;
+}
+
static int __cpuinitdata ntlb;
static int __init set_ntlb(char *str)
{
@@ -426,6 +471,8 @@ void __cpuinit tlb_init(void)
write_c0_pagegrain(pg);
}
+ temp_tlb_entry = current_cpu_data.tlbsize - 1;
+
/* From this point on the ARC firmware is dead. */
local_flush_tlb_all();

@ -0,0 +1,166 @@
From 6ee1d93455384cef8a0426effe85da241b525b63 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Date: Thu, 17 Jul 2014 23:26:33 +0200
Subject: [PATCH 153/153] MIPS: BCM47XX: Detect more then 128 MiB of RAM
(HIGHMEM)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
So far BCM47XX can only detect amount of HIGHMEM. It still requires
adding (registering) and well-testing before enabling by default.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7396/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
arch/mips/bcm47xx/bcm47xx_private.h | 3 ++
arch/mips/bcm47xx/prom.c | 68 ++++++++++++++++++++++++++++++++++++-
arch/mips/bcm47xx/setup.c | 3 ++
arch/mips/include/asm/pgtable-32.h | 2 ++
arch/mips/mm/tlb-r4k.c | 2 +-
5 files changed, 76 insertions(+), 2 deletions(-)
--- a/arch/mips/bcm47xx/bcm47xx_private.h
+++ b/arch/mips/bcm47xx/bcm47xx_private.h
@@ -3,6 +3,9 @@
#include <linux/kernel.h>
+/* prom.c */
+void __init bcm47xx_prom_highmem_init(void);
+
/* buttons.c */
int __init bcm47xx_buttons_register(void);
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -51,6 +51,8 @@ __init void bcm47xx_set_system_type(u16
chip_id);
}
+static unsigned long lowmem __initdata;
+
static __init void prom_init_mem(void)
{
unsigned long mem;
@@ -84,6 +86,7 @@ static __init void prom_init_mem(void)
if (!memcmp(prom_init, prom_init + mem, 32))
break;
}
+ lowmem = mem;
/* Ignoring the last page when ddr size is 128M. Cached
* accesses to last page is causing the processor to prefetch
@@ -92,7 +95,6 @@ static __init void prom_init_mem(void)
*/
if (c->cputype == CPU_74K && (mem == (128 << 20)))
mem -= 0x1000;
-
add_memory_region(0, mem, BOOT_MEM_RAM);
}
@@ -111,3 +113,67 @@ void __init prom_init(void)
void __init prom_free_prom_memory(void)
{
}
+
+#if defined(CONFIG_BCM47XX_BCMA) && defined(CONFIG_HIGHMEM)
+
+#define EXTVBASE 0xc0000000
+#define ENTRYLO(x) ((pte_val(pfn_pte((x) >> _PFN_SHIFT, PAGE_KERNEL_UNCACHED)) >> 6) | 1)
+
+#include <asm/tlbflush.h>
+
+/* Stripped version of tlb_init, with the call to build_tlb_refill_handler
+ * dropped. Calling it at this stage causes a hang.
+ */
+void __cpuinit early_tlb_init(void)
+{
+ write_c0_pagemask(PM_DEFAULT_MASK);
+ write_c0_wired(0);
+ temp_tlb_entry = current_cpu_data.tlbsize - 1;
+ local_flush_tlb_all();
+}
+
+void __init bcm47xx_prom_highmem_init(void)
+{
+ unsigned long off = (unsigned long)prom_init;
+ unsigned long extmem = 0;
+ bool highmem_region = false;
+
+ if (WARN_ON(bcm47xx_bus_type != BCM47XX_BUS_TYPE_BCMA))
+ return;
+
+ if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
+ highmem_region = true;
+
+ if (lowmem != 128 << 20 || !highmem_region)
+ return;
+
+ early_tlb_init();
+
+ /* Add one temporary TLB entry to map SDRAM Region 2.
+ * Physical Virtual
+ * 0x80000000 0xc0000000 (1st: 256MB)
+ * 0x90000000 0xd0000000 (2nd: 256MB)
+ */
+ add_temporary_entry(ENTRYLO(0x80000000),
+ ENTRYLO(0x80000000 + (256 << 20)),
+ EXTVBASE, PM_256M);
+
+ off = EXTVBASE + __pa(off);
+ for (extmem = 128 << 20; extmem < 512 << 20; extmem <<= 1) {
+ if (!memcmp(prom_init, (void *)(off + extmem), 16))
+ break;
+ }
+ extmem -= lowmem;
+
+ early_tlb_init();
+
+ if (!extmem)
+ return;
+
+ pr_warn("Found %lu MiB of extra memory, but highmem is unsupported yet!\n",
+ extmem >> 20);
+
+ /* TODO: Register extra memory */
+}
+
+#endif /* defined(CONFIG_BCM47XX_BCMA) && defined(CONFIG_HIGHMEM) */
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -214,6 +214,9 @@ void __init plat_mem_setup(void)
bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
bcm47xx_register_bcma();
bcm47xx_set_system_type(bcm47xx_bus.bcma.bus.chipinfo.id);
+#ifdef CONFIG_HIGHMEM
+ bcm47xx_prom_highmem_init();
+#endif
#endif
} else {
printk(KERN_INFO "bcm47xx: using ssb bus\n");
--- a/arch/mips/include/asm/pgtable-32.h
+++ b/arch/mips/include/asm/pgtable-32.h
@@ -18,6 +18,8 @@
#include <asm-generic/pgtable-nopmd.h>
+extern int temp_tlb_entry __cpuinitdata;
+
/*
* - add_temporary_entry() add a temporary TLB entry. We use TLB entries
* starting at the top and working down. This is for populating the
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -395,7 +395,7 @@ int __init has_transparent_hugepage(void
* lifetime of the system
*/
-static int temp_tlb_entry __cpuinitdata;
+int temp_tlb_entry __cpuinitdata;
__init int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
unsigned long entryhi, unsigned long pagemask)

@ -22,7 +22,7 @@ Acked-by: Rafa? Mi?ecki <zajec5@gmail.com>
#include <bcm47xx.h>
#include <bcm47xx_nvram.h>
#include <bcm47xx_board.h>
@@ -231,6 +232,31 @@ void __init plat_mem_setup(void)
@@ -234,6 +235,31 @@ void __init plat_mem_setup(void)
mips_set_machine_name(bcm47xx_board_get_name());
}

@ -30,7 +30,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
#include <linux/ssb/ssb.h>
#include <linux/ssb/ssb_embedded.h>
#include <linux/bcma/bcma_soc.h>
@@ -257,6 +260,12 @@ static int __init bcm47xx_cpu_fixes(void
@@ -260,6 +263,12 @@ static int __init bcm47xx_cpu_fixes(void
}
arch_initcall(bcm47xx_cpu_fixes);
@ -43,7 +43,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static int __init bcm47xx_register_bus_complete(void)
{
switch (bcm47xx_bus_type) {
@@ -275,6 +284,7 @@ static int __init bcm47xx_register_bus_c
@@ -278,6 +287,7 @@ static int __init bcm47xx_register_bus_c
bcm47xx_buttons_register();
bcm47xx_leds_register();
bcm47xx_workarounds();

@ -8,7 +8,7 @@
#include <asm/bootinfo.h>
#include <asm/prom.h>
#include <asm/reboot.h>
@@ -266,6 +267,33 @@ static struct fixed_phy_status bcm47xx_f
@@ -269,6 +270,33 @@ static struct fixed_phy_status bcm47xx_f
.duplex = DUPLEX_FULL,
};
@ -42,7 +42,7 @@
static int __init bcm47xx_register_bus_complete(void)
{
switch (bcm47xx_bus_type) {
@@ -285,6 +313,7 @@ static int __init bcm47xx_register_bus_c
@@ -288,6 +316,7 @@ static int __init bcm47xx_register_bus_c
bcm47xx_leds_register();
bcm47xx_workarounds();
fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status);

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