lantiq: VGV7510KW22 - enable the IP101A phy

The RJ45 WAN port is used for xDSL as well as the IP101A.

The pins 1,2,3,6 of the RJ45 are connected to the IP101A and the
pins 4,5 are connected to the xdsl chip.

Drop the ip101a-rst node. It can't be controlled and is not required
at all.

Signed-off-by: Mathias Kresin <dev@kresin.me>

target/linux/lantiq/dts/VGV7510KW22.dtsi

@@ -49,11 +49,6 @@
 			pinctrl-0 = <&state_default>;
 
 			state_default: pinmux {
-				ip101a-rst {
-					lantiq,pins = "io46";
-					lantiq,output = <0>;
-					lantiq,pull = <1>;
-				};
 				gphy-leds {
 					lantiq,groups = "gphy0 led0", "gphy0 led1",
 							"gphy1 led0", "gphy1 led1";
@@ -213,11 +208,33 @@
 		};
 	};
 
+	wan: interface@1 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <1>;
+		mtd-mac-address = <&boardconfig 0x16>;
+		mtd-mac-address-increment = <2>;
+		lantiq,wan;
+
+		ethernet@0 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <0>;
+			phy-mode = "mii";
+			phy-handle = <&phy1>;
+		};
+	};
+
 	mdio@0 {
 		#address-cells = <1>;
 		#size-cells = <0>;
 		compatible = "lantiq,xrx200-mdio";
 
+		phy1: ethernet-phy@1 {
+			reg = <0x1>;
+			compatible = "ethernet-phy-id0243.0c54", "ethernet-phy-ieee802.3-c22";
+		};
+
 		phy11: ethernet-phy@11 {
 			reg = <0x11>;
 			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";

target/linux/lantiq/xrx200/config-default

@@ -23,6 +23,7 @@ CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
 CONFIG_HAVE_DMA_CONTIGUOUS=y
 CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_HZ_PERIODIC=y
+CONFIG_ICPLUS_PHY=y
 CONFIG_INPUT=y
 CONFIG_INPUT_EVDEV=y
 CONFIG_INPUT_POLLDEV=y