ipq806x: use correct definition for nand-controller node

From kernel Documentation this should be called nand-controller

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
master
Ansuel Smith 4 years ago committed by Petr Štetiar
parent 851862cf80
commit d4c95b5d5c

@ -144,7 +144,7 @@
cs-gpios = <&qcom_pinmux 20 0>;
flash: m25p80@0 {
m25p80@0 {
compatible = "s25fl256s1";
#address-cells = <1>;
#size-cells = <1>;
@ -175,13 +175,13 @@
force_gen1 = <1>;
};
&nand {
&nand_controller {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
cs0 {
nand@0 {
reg = <0>;
compatible = "qcom,nandcs";

@ -121,7 +121,7 @@
cs-gpios = <&qcom_pinmux 20 0>;
flash: m25p80@0 {
m25p80@0 {
compatible = "s25fl256s1";
#address-cells = <1>;
#size-cells = <1>;
@ -164,13 +164,13 @@
status = "okay";
};
nand@1ac00000 {
nand-controller@1ac00000 {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
cs0 {
nand@0 {
reg = <0>;
compatible = "qcom,nandcs";

@ -157,7 +157,7 @@
cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
flash: m25p80@0 {
m25p80@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;

@ -184,7 +184,7 @@
force_gen1 = <1>;
};
nand@1ac00000 {
nand-controller@1ac00000 {
status = "okay";
pinctrl-0 = <&nand_pins>;
@ -193,7 +193,7 @@
#address-cells = <1>;
#size-cells = <0>;
cs0 {
nand@0 {
reg = <0>;
compatible = "qcom,nandcs";

@ -79,7 +79,7 @@
cs-gpios = <&qcom_pinmux 20 0>;
flash: m25p80@0 {
m25p80@0 {
compatible = "s25fl256s1";
#address-cells = <1>;
#size-cells = <1>;

@ -155,13 +155,13 @@
status = "okay";
};
nand@1ac00000 {
nand-controller@1ac00000 {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
cs0 {
nand@0 {
reg = <0>;
compatible = "qcom,nandcs";

@ -154,13 +154,13 @@
force_gen1 = <1>;
};
nand@1ac00000 {
nand-controller@1ac00000 {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
cs0 {
nand@0 {
reg = <0>;
compatible = "qcom,nandcs";

@ -188,13 +188,13 @@
force_gen1 = <1>;
};
nand@1ac00000 {
nand-controller@1ac00000 {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
cs0 {
nand@0 {
reg = <0>;
compatible = "qcom,nandcs";

@ -135,7 +135,7 @@
cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
flash: W25Q128@0 {
W25Q128@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;

@ -62,7 +62,7 @@
pinctrl-names = "default";
};
nand@1ac00000 {
nand-controller@1ac00000 {
status = "okay";
pinctrl-0 = <&nand_pins>;

@ -38,7 +38,7 @@
};
soc {
nand@1ac00000 {
nand-controller@1ac00000 {
status = "okay";
pinctrl-0 = <&nand_pins>;

@ -175,7 +175,7 @@
cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
flash: m25p80@0 {
m25p80@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;

@ -281,13 +281,13 @@
};
};
nand@1ac00000 {
nand-controller@1ac00000 {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
cs0 {
nand@0 {
reg = <0>;
compatible = "qcom,nandcs";

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