mac80211: update to latest wireless-testing + some monitor mode fixes and some libertas driver fixes
SVN-Revision: 32760v19.07.3_mercusys_ac12_duma
Felix Fietkau
12 years ago
parent
84585b45d6
commit
cf9bca8ded
File diff suppressed because it is too large
Load Diff
@ -1,11 +0,0 @@
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--- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
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+++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
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@@ -617,7 +617,7 @@ ath5k_conf_tx(struct ieee80211_hw *hw, s
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qi.tqi_aifs = params->aifs;
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qi.tqi_cw_min = params->cw_min;
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qi.tqi_cw_max = params->cw_max;
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- qi.tqi_burst_time = params->txop;
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+ qi.tqi_burst_time = params->txop * 32;
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ATH5K_DBG(ah, ATH5K_DEBUG_ANY,
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"Configure tx [queue %d], "
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@ -1,25 +0,0 @@
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--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
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@@ -3260,10 +3260,20 @@ static int ar9300_eeprom_restore_interna
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int it;
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u16 checksum, mchecksum;
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struct ath_common *common = ath9k_hw_common(ah);
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+ struct ar9300_eeprom *eep;
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eeprom_read_op read;
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- if (ath9k_hw_use_flash(ah))
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- return ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
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+ if (ath9k_hw_use_flash(ah)) {
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+ u8 txrx;
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+
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+ ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
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+
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+ /* check if eeprom contains valid data */
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+ eep = (struct ar9300_eeprom *) mptr;
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+ txrx = eep->baseEepHeader.txrxMask;
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+ if (txrx != 0 && txrx != 0xff)
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+ return 0;
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+ }
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word = kzalloc(2048, GFP_KERNEL);
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if (!word)
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@ -1,33 +0,0 @@
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--- a/drivers/net/wireless/ath/ath9k/main.c
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+++ b/drivers/net/wireless/ath/ath9k/main.c
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@@ -1840,12 +1840,29 @@ static u32 fill_chainmask(u32 cap, u32 n
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return filled;
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}
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+static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
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+{
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+ switch (val & 0x7) {
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+ case 0x1:
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+ case 0x3:
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+ case 0x7:
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+ return true;
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+ case 0x2:
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+ return (ah->caps.rx_chainmask == 1);
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+ default:
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+ return false;
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+ }
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+}
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+
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static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
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{
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struct ath_softc *sc = hw->priv;
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struct ath_hw *ah = sc->sc_ah;
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- if (!rx_ant || !tx_ant)
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+ if (ah->caps.rx_chainmask != 1)
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+ rx_ant |= tx_ant;
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+
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+ if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
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return -EINVAL;
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sc->ant_rx = rx_ant;
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@ -1,13 +0,0 @@
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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@@ -680,10 +680,6 @@ static int __ath9k_hw_init(struct ath_hw
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if (!AR_SREV_9300_20_OR_LATER(ah))
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ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
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- /* disable ANI for 9340 */
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- if (AR_SREV_9340(ah))
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- ah->config.enable_ani = false;
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-
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ath9k_hw_init_mode_regs(ah);
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if (!ah->is_pciexpress)
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@ -1,66 +0,0 @@
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--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
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@@ -561,8 +561,8 @@ static void ar9003_tx_gain_table_mode1(s
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5);
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else if (AR_SREV_9340(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
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- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
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+ ar9340Modes_high_ob_db_tx_gain_table_1p0,
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+ ARRAY_SIZE(ar9340Modes_high_ob_db_tx_gain_table_1p0),
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5);
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else if (AR_SREV_9485_11(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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@@ -605,8 +605,8 @@ static void ar9003_tx_gain_table_mode2(s
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5);
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else if (AR_SREV_9340(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
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- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
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+ ar9340Modes_low_ob_db_tx_gain_table_1p0,
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+ ARRAY_SIZE(ar9340Modes_low_ob_db_tx_gain_table_1p0),
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5);
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else if (AR_SREV_9485_11(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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@@ -639,8 +639,8 @@ static void ar9003_tx_gain_table_mode3(s
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5);
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else if (AR_SREV_9340(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
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- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
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+ ar9340Modes_high_power_tx_gain_table_1p0,
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+ ARRAY_SIZE(ar9340Modes_high_power_tx_gain_table_1p0),
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5);
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else if (AR_SREV_9485_11(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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@@ -659,6 +659,20 @@ static void ar9003_tx_gain_table_mode3(s
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5);
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}
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+static void ar9003_tx_gain_table_mode4(struct ath_hw *ah)
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+{
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+ if (AR_SREV_9340(ah))
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+ INIT_INI_ARRAY(&ah->iniModesTxGain,
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+ ar9340Modes_mixed_ob_db_tx_gain_table_1p0,
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+ ARRAY_SIZE(ar9340Modes_mixed_ob_db_tx_gain_table_1p0),
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+ 5);
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+ else if (AR_SREV_9580(ah))
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+ INIT_INI_ARRAY(&ah->iniModesTxGain,
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+ ar9580_1p0_mixed_ob_db_tx_gain_table,
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+ ARRAY_SIZE(ar9580_1p0_mixed_ob_db_tx_gain_table),
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+ 5);
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+}
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+
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static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
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{
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switch (ar9003_hw_get_tx_gain_idx(ah)) {
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@@ -675,6 +689,9 @@ static void ar9003_tx_gain_table_apply(s
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case 3:
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ar9003_tx_gain_table_mode3(ah);
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break;
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+ case 4:
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+ ar9003_tx_gain_table_mode4(ah);
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+ break;
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}
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}
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File diff suppressed because it is too large
Load Diff
@ -1,22 +0,0 @@
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--- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
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+++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
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@@ -1351,7 +1351,7 @@ static int ath9k_htc_conf_tx(struct ieee
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qi.tqi_aifs = params->aifs;
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qi.tqi_cwmin = params->cw_min;
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qi.tqi_cwmax = params->cw_max;
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- qi.tqi_burstTime = params->txop;
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+ qi.tqi_burstTime = params->txop * 32;
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qnum = get_hw_qnum(queue, priv->hwq_map);
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--- a/drivers/net/wireless/ath/ath9k/main.c
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+++ b/drivers/net/wireless/ath/ath9k/main.c
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@@ -1359,7 +1359,7 @@ static int ath9k_conf_tx(struct ieee8021
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qi.tqi_aifs = params->aifs;
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qi.tqi_cwmin = params->cw_min;
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qi.tqi_cwmax = params->cw_max;
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- qi.tqi_burstTime = params->txop;
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+ qi.tqi_burstTime = params->txop * 32;
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ath_dbg(common, CONFIG,
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"Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
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@ -1,59 +0,0 @@
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--- a/drivers/net/wireless/ath/ath9k/ath9k.h
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+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
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@@ -297,6 +297,7 @@ struct ath_tx {
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struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
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struct ath_descdma txdma;
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struct ath_txq *txq_map[WME_NUM_AC];
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+ u32 txq_max_pending[WME_NUM_AC];
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};
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struct ath_rx_edma {
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--- a/drivers/net/wireless/ath/ath9k/init.c
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+++ b/drivers/net/wireless/ath/ath9k/init.c
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@@ -436,6 +436,7 @@ static int ath9k_init_queues(struct ath_
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for (i = 0; i < WME_NUM_AC; i++) {
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sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i);
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sc->tx.txq_map[i]->mac80211_qnum = i;
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+ sc->tx.txq_max_pending[i] = ATH_MAX_QDEPTH;
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}
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return 0;
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}
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--- a/drivers/net/wireless/ath/ath9k/xmit.c
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+++ b/drivers/net/wireless/ath/ath9k/xmit.c
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@@ -1987,7 +1987,8 @@ int ath_tx_start(struct ieee80211_hw *hw
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ath_txq_lock(sc, txq);
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if (txq == sc->tx.txq_map[q] &&
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- ++txq->pending_frames > ATH_MAX_QDEPTH && !txq->stopped) {
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+ ++txq->pending_frames > sc->tx.txq_max_pending[q] &&
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+ !txq->stopped) {
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ieee80211_stop_queue(sc->hw, q);
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txq->stopped = true;
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}
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@@ -2046,7 +2047,8 @@ static void ath_tx_complete(struct ath_s
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if (WARN_ON(--txq->pending_frames < 0))
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txq->pending_frames = 0;
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- if (txq->stopped && txq->pending_frames < ATH_MAX_QDEPTH) {
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+ if (txq->stopped &&
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+ txq->pending_frames < sc->tx.txq_max_pending[q]) {
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ieee80211_wake_queue(sc->hw, q);
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txq->stopped = false;
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}
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--- a/drivers/net/wireless/ath/ath9k/debug.c
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+++ b/drivers/net/wireless/ath/ath9k/debug.c
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@@ -1701,6 +1701,14 @@ int ath9k_init_debug(struct ath_hw *ah)
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&fops_interrupt);
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debugfs_create_file("xmit", S_IRUSR, sc->debug.debugfs_phy, sc,
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&fops_xmit);
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+ debugfs_create_u32("qlen_bk", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
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+ &sc->tx.txq_max_pending[WME_AC_BK]);
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+ debugfs_create_u32("qlen_be", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
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+ &sc->tx.txq_max_pending[WME_AC_BE]);
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+ debugfs_create_u32("qlen_vi", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
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+ &sc->tx.txq_max_pending[WME_AC_VI]);
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+ debugfs_create_u32("qlen_vo", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
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+ &sc->tx.txq_max_pending[WME_AC_VO]);
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debugfs_create_file("stations", S_IRUSR, sc->debug.debugfs_phy, sc,
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&fops_stations);
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debugfs_create_file("misc", S_IRUSR, sc->debug.debugfs_phy, sc,
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@ -1,135 +0,0 @@
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--- a/drivers/net/wireless/ath/ath9k/ath9k.h
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+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
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@@ -298,6 +298,7 @@ struct ath_tx {
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struct ath_descdma txdma;
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struct ath_txq *txq_map[WME_NUM_AC];
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u32 txq_max_pending[WME_NUM_AC];
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+ u16 max_aggr_framelen[WME_NUM_AC][4][32];
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};
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struct ath_rx_edma {
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@@ -342,6 +343,7 @@ int ath_tx_init(struct ath_softc *sc, in
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void ath_tx_cleanup(struct ath_softc *sc);
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int ath_txq_update(struct ath_softc *sc, int qnum,
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struct ath9k_tx_queue_info *q);
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+void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
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int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
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struct ath_tx_control *txctl);
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void ath_tx_tasklet(struct ath_softc *sc);
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--- a/drivers/net/wireless/ath/ath9k/xmit.c
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+++ b/drivers/net/wireless/ath/ath9k/xmit.c
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@@ -29,6 +29,8 @@
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#define HT_LTF(_ns) (4 * (_ns))
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#define SYMBOL_TIME(_ns) ((_ns) << 2) /* ns * 4 us */
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#define SYMBOL_TIME_HALFGI(_ns) (((_ns) * 18 + 4) / 5) /* ns * 3.6 us */
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+#define TIME_SYMBOLS(t) ((t) >> 2)
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+#define TIME_SYMBOLS_HALFGI(t) (((t) * 5 - 4) / 18)
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#define NUM_SYMBOLS_PER_USEC(_usec) (_usec >> 2)
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#define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18)
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@@ -74,33 +76,6 @@ enum {
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MCS_HT40_SGI,
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};
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-static int ath_max_4ms_framelen[4][32] = {
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- [MCS_HT20] = {
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- 3212, 6432, 9648, 12864, 19300, 25736, 28952, 32172,
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- 6424, 12852, 19280, 25708, 38568, 51424, 57852, 64280,
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- 9628, 19260, 28896, 38528, 57792, 65532, 65532, 65532,
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- 12828, 25656, 38488, 51320, 65532, 65532, 65532, 65532,
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- },
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- [MCS_HT20_SGI] = {
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- 3572, 7144, 10720, 14296, 21444, 28596, 32172, 35744,
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- 7140, 14284, 21428, 28568, 42856, 57144, 64288, 65532,
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- 10700, 21408, 32112, 42816, 64228, 65532, 65532, 65532,
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- 14256, 28516, 42780, 57040, 65532, 65532, 65532, 65532,
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- },
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- [MCS_HT40] = {
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- 6680, 13360, 20044, 26724, 40092, 53456, 60140, 65532,
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- 13348, 26700, 40052, 53400, 65532, 65532, 65532, 65532,
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- 20004, 40008, 60016, 65532, 65532, 65532, 65532, 65532,
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- 26644, 53292, 65532, 65532, 65532, 65532, 65532, 65532,
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- },
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- [MCS_HT40_SGI] = {
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- 7420, 14844, 22272, 29696, 44544, 59396, 65532, 65532,
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- 14832, 29668, 44504, 59340, 65532, 65532, 65532, 65532,
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- 22232, 44464, 65532, 65532, 65532, 65532, 65532, 65532,
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- 29616, 59232, 65532, 65532, 65532, 65532, 65532, 65532,
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- }
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-};
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-
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/*********************/
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/* Aggregation logic */
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/*********************/
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@@ -648,6 +623,7 @@ static u32 ath_lookup_rate(struct ath_so
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struct ieee80211_tx_rate *rates;
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u32 max_4ms_framelen, frmlen;
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u16 aggr_limit, bt_aggr_limit, legacy = 0;
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+ int q = tid->ac->txq->mac80211_qnum;
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int i;
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skb = bf->bf_mpdu;
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@@ -680,7 +656,7 @@ static u32 ath_lookup_rate(struct ath_so
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if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
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modeidx++;
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- frmlen = ath_max_4ms_framelen[modeidx][rates[i].idx];
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+ frmlen = sc->tx.max_aggr_framelen[q][modeidx][rates[i].idx];
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max_4ms_framelen = min(max_4ms_framelen, frmlen);
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}
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@@ -927,6 +903,44 @@ static u32 ath_pkt_duration(struct ath_s
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return duration;
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}
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+static int ath_max_framelen(int usec, int mcs, bool ht40, bool sgi)
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+{
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+ int streams = HT_RC_2_STREAMS(mcs);
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+ int symbols, bits;
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+ int bytes = 0;
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+
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+ symbols = sgi ? TIME_SYMBOLS_HALFGI(usec) : TIME_SYMBOLS(usec);
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+ bits = symbols * bits_per_symbol[mcs % 8][ht40] * streams;
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+ bits -= OFDM_PLCP_BITS;
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+ bytes = bits / 8;
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+ bytes -= L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
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+ if (bytes > 65532)
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+ bytes = 65532;
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+
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+ return bytes;
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+}
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+
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+void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop)
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+{
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+ u16 *cur_ht20, *cur_ht20_sgi, *cur_ht40, *cur_ht40_sgi;
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+ int mcs;
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+
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+ /* 4ms is the default (and maximum) duration */
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+ if (!txop || txop > 4096)
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+ txop = 4096;
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+
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+ cur_ht20 = sc->tx.max_aggr_framelen[queue][MCS_HT20];
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+ cur_ht20_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT20_SGI];
|
||||
+ cur_ht40 = sc->tx.max_aggr_framelen[queue][MCS_HT40];
|
||||
+ cur_ht40_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT40_SGI];
|
||||
+ for (mcs = 0; mcs < 32; mcs++) {
|
||||
+ cur_ht20[mcs] = ath_max_framelen(txop, mcs, false, false);
|
||||
+ cur_ht20_sgi[mcs] = ath_max_framelen(txop, mcs, false, true);
|
||||
+ cur_ht40[mcs] = ath_max_framelen(txop, mcs, true, false);
|
||||
+ cur_ht40_sgi[mcs] = ath_max_framelen(txop, mcs, true, true);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf,
|
||||
struct ath_tx_info *info, int len)
|
||||
{
|
||||
--- a/drivers/net/wireless/ath/ath9k/main.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/main.c
|
||||
@@ -1366,6 +1366,7 @@ static int ath9k_conf_tx(struct ieee8021
|
||||
queue, txq->axq_qnum, params->aifs, params->cw_min,
|
||||
params->cw_max, params->txop);
|
||||
|
||||
+ ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
|
||||
ret = ath_txq_update(sc, txq->axq_qnum, &qi);
|
||||
if (ret)
|
||||
ath_err(common, "TXQ Update failed\n");
|
||||
@ -1,35 +0,0 @@
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
@@ -3962,9 +3962,32 @@ static void ar9003_hw_txend_to_xpa_off_a
|
||||
AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value);
|
||||
}
|
||||
|
||||
+static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is_2ghz)
|
||||
+{
|
||||
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
+ u8 xpa_ctl;
|
||||
+
|
||||
+ if (!(eep->baseEepHeader.featureEnable & 0x80))
|
||||
+ return;
|
||||
+
|
||||
+ if (!AR_SREV_9300(ah) && !AR_SREV_9340(ah) && !AR_SREV_9580(ah))
|
||||
+ return;
|
||||
+
|
||||
+ if (is_2ghz) {
|
||||
+ xpa_ctl = eep->modalHeader2G.txFrameToXpaOn;
|
||||
+ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
|
||||
+ AR_PHY_XPA_TIMING_CTL_FRAME_XPAB_ON, xpa_ctl);
|
||||
+ } else {
|
||||
+ xpa_ctl = eep->modalHeader5G.txFrameToXpaOn;
|
||||
+ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
|
||||
+ AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
|
||||
struct ath9k_channel *chan)
|
||||
{
|
||||
+ ar9003_hw_xpa_timing_control_apply(ah, IS_CHAN_2GHZ(chan));
|
||||
ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
|
||||
ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
|
||||
ar9003_hw_drive_strength_apply(ah);
|
||||
@ -1,274 +0,0 @@
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
@@ -2971,14 +2971,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
|
||||
return (pBase->txrxMask >> 4) & 0xf;
|
||||
case EEP_RX_MASK:
|
||||
return pBase->txrxMask & 0xf;
|
||||
- case EEP_DRIVE_STRENGTH:
|
||||
-#define AR9300_EEP_BASE_DRIV_STRENGTH 0x1
|
||||
- return pBase->miscConfiguration & AR9300_EEP_BASE_DRIV_STRENGTH;
|
||||
- case EEP_INTERNAL_REGULATOR:
|
||||
- /* Bit 4 is internal regulator flag */
|
||||
- return (pBase->featureEnable & 0x10) >> 4;
|
||||
- case EEP_SWREG:
|
||||
- return le32_to_cpu(pBase->swreg);
|
||||
case EEP_PAPRD:
|
||||
return !!(pBase->featureEnable & BIT(5));
|
||||
case EEP_CHAIN_MASK_REDUCE:
|
||||
@@ -2989,8 +2981,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
|
||||
return eep->modalHeader5G.antennaGain;
|
||||
case EEP_ANTENNA_GAIN_2G:
|
||||
return eep->modalHeader2G.antennaGain;
|
||||
- case EEP_QUICK_DROP:
|
||||
- return pBase->miscConfiguration & BIT(1);
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
@@ -3503,19 +3493,20 @@ static int ath9k_hw_ar9300_get_eeprom_re
|
||||
return 0;
|
||||
}
|
||||
|
||||
-static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
|
||||
+static struct ar9300_modal_eep_header *ar9003_modal_header(struct ath_hw *ah,
|
||||
+ bool is2ghz)
|
||||
{
|
||||
struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
|
||||
if (is2ghz)
|
||||
- return eep->modalHeader2G.xpaBiasLvl;
|
||||
+ return &eep->modalHeader2G;
|
||||
else
|
||||
- return eep->modalHeader5G.xpaBiasLvl;
|
||||
+ return &eep->modalHeader5G;
|
||||
}
|
||||
|
||||
static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
|
||||
{
|
||||
- int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz);
|
||||
+ int bias = ar9003_modal_header(ah, is2ghz)->xpaBiasLvl;
|
||||
|
||||
if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
|
||||
REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
|
||||
@@ -3531,57 +3522,26 @@ static void ar9003_hw_xpa_bias_level_app
|
||||
}
|
||||
}
|
||||
|
||||
-static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is_2ghz)
|
||||
+static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is2ghz)
|
||||
{
|
||||
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
- __le16 val;
|
||||
-
|
||||
- if (is_2ghz)
|
||||
- val = eep->modalHeader2G.switchcomspdt;
|
||||
- else
|
||||
- val = eep->modalHeader5G.switchcomspdt;
|
||||
- return le16_to_cpu(val);
|
||||
+ return le16_to_cpu(ar9003_modal_header(ah, is2ghz)->switchcomspdt);
|
||||
}
|
||||
|
||||
|
||||
static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
|
||||
{
|
||||
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
- __le32 val;
|
||||
-
|
||||
- if (is2ghz)
|
||||
- val = eep->modalHeader2G.antCtrlCommon;
|
||||
- else
|
||||
- val = eep->modalHeader5G.antCtrlCommon;
|
||||
- return le32_to_cpu(val);
|
||||
+ return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon);
|
||||
}
|
||||
|
||||
static u32 ar9003_hw_ant_ctrl_common_2_get(struct ath_hw *ah, bool is2ghz)
|
||||
{
|
||||
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
- __le32 val;
|
||||
-
|
||||
- if (is2ghz)
|
||||
- val = eep->modalHeader2G.antCtrlCommon2;
|
||||
- else
|
||||
- val = eep->modalHeader5G.antCtrlCommon2;
|
||||
- return le32_to_cpu(val);
|
||||
+ return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon2);
|
||||
}
|
||||
|
||||
-static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah,
|
||||
- int chain,
|
||||
+static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah, int chain,
|
||||
bool is2ghz)
|
||||
{
|
||||
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
- __le16 val = 0;
|
||||
-
|
||||
- if (chain >= 0 && chain < AR9300_MAX_CHAINS) {
|
||||
- if (is2ghz)
|
||||
- val = eep->modalHeader2G.antCtrlChain[chain];
|
||||
- else
|
||||
- val = eep->modalHeader5G.antCtrlChain[chain];
|
||||
- }
|
||||
-
|
||||
+ __le16 val = ar9003_modal_header(ah, is2ghz)->antCtrlChain[chain];
|
||||
return le16_to_cpu(val);
|
||||
}
|
||||
|
||||
@@ -3691,11 +3651,12 @@ static void ar9003_hw_ant_ctrl_apply(str
|
||||
|
||||
static void ar9003_hw_drive_strength_apply(struct ath_hw *ah)
|
||||
{
|
||||
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
+ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
|
||||
int drive_strength;
|
||||
unsigned long reg;
|
||||
|
||||
- drive_strength = ath9k_hw_ar9300_get_eeprom(ah, EEP_DRIVE_STRENGTH);
|
||||
-
|
||||
+ drive_strength = pBase->miscConfiguration & BIT(0);
|
||||
if (!drive_strength)
|
||||
return;
|
||||
|
||||
@@ -3825,11 +3786,11 @@ static bool is_pmu_set(struct ath_hw *ah
|
||||
|
||||
void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
|
||||
{
|
||||
- int internal_regulator =
|
||||
- ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR);
|
||||
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
+ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
|
||||
u32 reg_val;
|
||||
|
||||
- if (internal_regulator) {
|
||||
+ if (pBase->featureEnable & BIT(4)) {
|
||||
if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
|
||||
int reg_pmu_set;
|
||||
|
||||
@@ -3873,11 +3834,11 @@ void ar9003_hw_internal_regulator_apply(
|
||||
if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))
|
||||
return;
|
||||
} else if (AR_SREV_9462(ah)) {
|
||||
- reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
|
||||
+ reg_val = le32_to_cpu(pBase->swreg);
|
||||
REG_WRITE(ah, AR_PHY_PMU1, reg_val);
|
||||
} else {
|
||||
/* Internal regulator is ON. Write swreg register. */
|
||||
- reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
|
||||
+ reg_val = le32_to_cpu(pBase->swreg);
|
||||
REG_WRITE(ah, AR_RTC_REG_CONTROL1,
|
||||
REG_READ(ah, AR_RTC_REG_CONTROL1) &
|
||||
(~AR_RTC_REG_CONTROL1_SWREG_PROGRAM));
|
||||
@@ -3931,10 +3892,11 @@ static void ar9003_hw_apply_tuning_caps(
|
||||
static void ar9003_hw_quick_drop_apply(struct ath_hw *ah, u16 freq)
|
||||
{
|
||||
struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
- int quick_drop = ath9k_hw_ar9300_get_eeprom(ah, EEP_QUICK_DROP);
|
||||
+ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
|
||||
+ int quick_drop;
|
||||
s32 t[3], f[3] = {5180, 5500, 5785};
|
||||
|
||||
- if (!quick_drop)
|
||||
+ if (!(pBase->miscConfiguration & BIT(1)))
|
||||
return;
|
||||
|
||||
if (freq < 4000)
|
||||
@@ -3948,13 +3910,11 @@ static void ar9003_hw_quick_drop_apply(s
|
||||
REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
|
||||
}
|
||||
|
||||
-static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, u16 freq)
|
||||
+static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, bool is2ghz)
|
||||
{
|
||||
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
u32 value;
|
||||
|
||||
- value = (freq < 4000) ? eep->modalHeader2G.txEndToXpaOff :
|
||||
- eep->modalHeader5G.txEndToXpaOff;
|
||||
+ value = ar9003_modal_header(ah, is2ghz)->txEndToXpaOff;
|
||||
|
||||
REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
|
||||
AR_PHY_XPA_TIMING_CTL_TX_END_XPAB_OFF, value);
|
||||
@@ -3962,7 +3922,7 @@ static void ar9003_hw_txend_to_xpa_off_a
|
||||
AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value);
|
||||
}
|
||||
|
||||
-static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is_2ghz)
|
||||
+static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is2ghz)
|
||||
{
|
||||
struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
u8 xpa_ctl;
|
||||
@@ -3973,23 +3933,22 @@ static void ar9003_hw_xpa_timing_control
|
||||
if (!AR_SREV_9300(ah) && !AR_SREV_9340(ah) && !AR_SREV_9580(ah))
|
||||
return;
|
||||
|
||||
- if (is_2ghz) {
|
||||
- xpa_ctl = eep->modalHeader2G.txFrameToXpaOn;
|
||||
+ xpa_ctl = ar9003_modal_header(ah, is2ghz)->txFrameToXpaOn;
|
||||
+ if (is2ghz)
|
||||
REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
|
||||
AR_PHY_XPA_TIMING_CTL_FRAME_XPAB_ON, xpa_ctl);
|
||||
- } else {
|
||||
- xpa_ctl = eep->modalHeader5G.txFrameToXpaOn;
|
||||
+ else
|
||||
REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
|
||||
AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
|
||||
- }
|
||||
}
|
||||
|
||||
static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
|
||||
struct ath9k_channel *chan)
|
||||
{
|
||||
- ar9003_hw_xpa_timing_control_apply(ah, IS_CHAN_2GHZ(chan));
|
||||
- ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
|
||||
- ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
|
||||
+ bool is2ghz = IS_CHAN_2GHZ(chan);
|
||||
+ ar9003_hw_xpa_timing_control_apply(ah, is2ghz);
|
||||
+ ar9003_hw_xpa_bias_level_apply(ah, is2ghz);
|
||||
+ ar9003_hw_ant_ctrl_apply(ah, is2ghz);
|
||||
ar9003_hw_drive_strength_apply(ah);
|
||||
ar9003_hw_atten_apply(ah, chan);
|
||||
ar9003_hw_quick_drop_apply(ah, chan->channel);
|
||||
@@ -3997,7 +3956,7 @@ static void ath9k_hw_ar9300_set_board_va
|
||||
ar9003_hw_internal_regulator_apply(ah);
|
||||
if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
|
||||
ar9003_hw_apply_tuning_caps(ah);
|
||||
- ar9003_hw_txend_to_xpa_off_apply(ah, chan->channel);
|
||||
+ ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);
|
||||
}
|
||||
|
||||
static void ath9k_hw_ar9300_set_addac(struct ath_hw *ah,
|
||||
@@ -5133,14 +5092,9 @@ s32 ar9003_hw_get_rx_gain_idx(struct ath
|
||||
return (eep->baseEepHeader.txrxgain) & 0xf; /* bits 3:0 */
|
||||
}
|
||||
|
||||
-u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is_2ghz)
|
||||
+u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is2ghz)
|
||||
{
|
||||
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
-
|
||||
- if (is_2ghz)
|
||||
- return eep->modalHeader2G.spurChans;
|
||||
- else
|
||||
- return eep->modalHeader5G.spurChans;
|
||||
+ return ar9003_modal_header(ah, is2ghz)->spurChans;
|
||||
}
|
||||
|
||||
unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah,
|
||||
--- a/drivers/net/wireless/ath/ath9k/eeprom.h
|
||||
+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
|
||||
@@ -241,16 +241,12 @@ enum eeprom_param {
|
||||
EEP_TEMPSENSE_SLOPE,
|
||||
EEP_TEMPSENSE_SLOPE_PAL_ON,
|
||||
EEP_PWR_TABLE_OFFSET,
|
||||
- EEP_DRIVE_STRENGTH,
|
||||
- EEP_INTERNAL_REGULATOR,
|
||||
- EEP_SWREG,
|
||||
EEP_PAPRD,
|
||||
EEP_MODAL_VER,
|
||||
EEP_ANT_DIV_CTL1,
|
||||
EEP_CHAIN_MASK_REDUCE,
|
||||
EEP_ANTENNA_GAIN_2G,
|
||||
EEP_ANTENNA_GAIN_5G,
|
||||
- EEP_QUICK_DROP
|
||||
};
|
||||
|
||||
enum ar5416_rates {
|
||||
@ -1,182 +0,0 @@
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
@@ -131,8 +131,9 @@ static const struct ar9300_eeprom ar9300
|
||||
.thresh62 = 28,
|
||||
.papdRateMaskHt20 = LE32(0x0cf0e0e0),
|
||||
.papdRateMaskHt40 = LE32(0x6cf0e0e0),
|
||||
+ .xlna_bias_strength = 0,
|
||||
.futureModal = {
|
||||
- 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0, 0,
|
||||
},
|
||||
},
|
||||
.base_ext1 = {
|
||||
@@ -331,8 +332,9 @@ static const struct ar9300_eeprom ar9300
|
||||
.thresh62 = 28,
|
||||
.papdRateMaskHt20 = LE32(0x0c80c080),
|
||||
.papdRateMaskHt40 = LE32(0x0080c080),
|
||||
+ .xlna_bias_strength = 0,
|
||||
.futureModal = {
|
||||
- 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0, 0,
|
||||
},
|
||||
},
|
||||
.base_ext2 = {
|
||||
@@ -704,8 +706,9 @@ static const struct ar9300_eeprom ar9300
|
||||
.thresh62 = 28,
|
||||
.papdRateMaskHt20 = LE32(0x0c80c080),
|
||||
.papdRateMaskHt40 = LE32(0x0080c080),
|
||||
+ .xlna_bias_strength = 0,
|
||||
.futureModal = {
|
||||
- 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0, 0,
|
||||
},
|
||||
},
|
||||
.base_ext1 = {
|
||||
@@ -904,8 +907,9 @@ static const struct ar9300_eeprom ar9300
|
||||
.thresh62 = 28,
|
||||
.papdRateMaskHt20 = LE32(0x0cf0e0e0),
|
||||
.papdRateMaskHt40 = LE32(0x6cf0e0e0),
|
||||
+ .xlna_bias_strength = 0,
|
||||
.futureModal = {
|
||||
- 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0, 0,
|
||||
},
|
||||
},
|
||||
.base_ext2 = {
|
||||
@@ -1278,8 +1282,9 @@ static const struct ar9300_eeprom ar9300
|
||||
.thresh62 = 28,
|
||||
.papdRateMaskHt20 = LE32(0x0c80c080),
|
||||
.papdRateMaskHt40 = LE32(0x0080c080),
|
||||
+ .xlna_bias_strength = 0,
|
||||
.futureModal = {
|
||||
- 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0, 0,
|
||||
},
|
||||
},
|
||||
.base_ext1 = {
|
||||
@@ -1478,8 +1483,9 @@ static const struct ar9300_eeprom ar9300
|
||||
.thresh62 = 28,
|
||||
.papdRateMaskHt20 = LE32(0x0cf0e0e0),
|
||||
.papdRateMaskHt40 = LE32(0x6cf0e0e0),
|
||||
+ .xlna_bias_strength = 0,
|
||||
.futureModal = {
|
||||
- 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0, 0,
|
||||
},
|
||||
},
|
||||
.base_ext2 = {
|
||||
@@ -1852,8 +1858,9 @@ static const struct ar9300_eeprom ar9300
|
||||
.thresh62 = 28,
|
||||
.papdRateMaskHt20 = LE32(0x0c80c080),
|
||||
.papdRateMaskHt40 = LE32(0x0080c080),
|
||||
+ .xlna_bias_strength = 0,
|
||||
.futureModal = {
|
||||
- 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0, 0,
|
||||
},
|
||||
},
|
||||
.base_ext1 = {
|
||||
@@ -2052,8 +2059,9 @@ static const struct ar9300_eeprom ar9300
|
||||
.thresh62 = 28,
|
||||
.papdRateMaskHt20 = LE32(0x0cf0e0e0),
|
||||
.papdRateMaskHt40 = LE32(0x6cf0e0e0),
|
||||
+ .xlna_bias_strength = 0,
|
||||
.futureModal = {
|
||||
- 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0, 0,
|
||||
},
|
||||
},
|
||||
.base_ext2 = {
|
||||
@@ -2425,8 +2433,9 @@ static const struct ar9300_eeprom ar9300
|
||||
.thresh62 = 28,
|
||||
.papdRateMaskHt20 = LE32(0x0c80C080),
|
||||
.papdRateMaskHt40 = LE32(0x0080C080),
|
||||
+ .xlna_bias_strength = 0,
|
||||
.futureModal = {
|
||||
- 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0, 0,
|
||||
},
|
||||
},
|
||||
.base_ext1 = {
|
||||
@@ -2625,8 +2634,9 @@ static const struct ar9300_eeprom ar9300
|
||||
.thresh62 = 28,
|
||||
.papdRateMaskHt20 = LE32(0x0cf0e0e0),
|
||||
.papdRateMaskHt40 = LE32(0x6cf0e0e0),
|
||||
+ .xlna_bias_strength = 0,
|
||||
.futureModal = {
|
||||
- 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0, 0,
|
||||
},
|
||||
},
|
||||
.base_ext2 = {
|
||||
@@ -3942,6 +3952,28 @@ static void ar9003_hw_xpa_timing_control
|
||||
AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
|
||||
}
|
||||
|
||||
+static void ar9003_hw_xlna_bias_strength_apply(struct ath_hw *ah, bool is2ghz)
|
||||
+{
|
||||
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
+ u8 bias;
|
||||
+
|
||||
+ if (!(eep->baseEepHeader.featureEnable & 0x40))
|
||||
+ return;
|
||||
+
|
||||
+ if (!AR_SREV_9300(ah))
|
||||
+ return;
|
||||
+
|
||||
+ bias = ar9003_modal_header(ah, is2ghz)->xlna_bias_strength;
|
||||
+ REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
|
||||
+ bias & 0x3);
|
||||
+ bias >>= 2;
|
||||
+ REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
|
||||
+ bias & 0x3);
|
||||
+ bias >>= 2;
|
||||
+ REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
|
||||
+ bias & 0x3);
|
||||
+}
|
||||
+
|
||||
static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
|
||||
struct ath9k_channel *chan)
|
||||
{
|
||||
@@ -3950,6 +3982,7 @@ static void ath9k_hw_ar9300_set_board_va
|
||||
ar9003_hw_xpa_bias_level_apply(ah, is2ghz);
|
||||
ar9003_hw_ant_ctrl_apply(ah, is2ghz);
|
||||
ar9003_hw_drive_strength_apply(ah);
|
||||
+ ar9003_hw_xlna_bias_strength_apply(ah, is2ghz);
|
||||
ar9003_hw_atten_apply(ah, chan);
|
||||
ar9003_hw_quick_drop_apply(ah, chan->channel);
|
||||
if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah) && !AR_SREV_9550(ah))
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
|
||||
@@ -231,7 +231,8 @@ struct ar9300_modal_eep_header {
|
||||
__le32 papdRateMaskHt20;
|
||||
__le32 papdRateMaskHt40;
|
||||
__le16 switchcomspdt;
|
||||
- u8 futureModal[8];
|
||||
+ u8 xlna_bias_strength;
|
||||
+ u8 futureModal[7];
|
||||
} __packed;
|
||||
|
||||
struct ar9300_cal_data_per_freq_op_loop {
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
|
||||
@@ -633,6 +633,8 @@
|
||||
#define AR_PHY_65NM_CH0_BIAS2 0x160c4
|
||||
#define AR_PHY_65NM_CH0_BIAS4 0x160cc
|
||||
#define AR_PHY_65NM_CH0_RXTX4 0x1610c
|
||||
+#define AR_PHY_65NM_CH1_RXTX4 0x1650c
|
||||
+#define AR_PHY_65NM_CH2_RXTX4 0x1690c
|
||||
|
||||
#define AR_CH0_TOP (AR_SREV_9300(ah) ? 0x16288 : \
|
||||
((AR_SREV_9462(ah) ? 0x1628c : 0x16280)))
|
||||
@@ -876,6 +878,9 @@
|
||||
#define AR_PHY_65NM_CH0_RXTX4_THERM_ON 0x10000000
|
||||
#define AR_PHY_65NM_CH0_RXTX4_THERM_ON_S 28
|
||||
|
||||
+#define AR_PHY_65NM_RXTX4_XLNA_BIAS 0xC0000000
|
||||
+#define AR_PHY_65NM_RXTX4_XLNA_BIAS_S 30
|
||||
+
|
||||
/*
|
||||
* Channel 1 Register Map
|
||||
*/
|
||||
@ -1,22 +0,0 @@
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
@@ -3890,6 +3890,9 @@ static void ar9003_hw_apply_tuning_caps(
|
||||
struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
u8 tuning_caps_param = eep->baseEepHeader.params_for_tuning_caps[0];
|
||||
|
||||
+ if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
|
||||
+ return;
|
||||
+
|
||||
if (eep->baseEepHeader.featureEnable & 0x40) {
|
||||
tuning_caps_param &= 0x7f;
|
||||
REG_RMW_FIELD(ah, AR_CH0_XTAL, AR_CH0_XTAL_CAPINDAC,
|
||||
@@ -3987,8 +3990,7 @@ static void ath9k_hw_ar9300_set_board_va
|
||||
ar9003_hw_quick_drop_apply(ah, chan->channel);
|
||||
if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah) && !AR_SREV_9550(ah))
|
||||
ar9003_hw_internal_regulator_apply(ah);
|
||||
- if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
|
||||
- ar9003_hw_apply_tuning_caps(ah);
|
||||
+ ar9003_hw_apply_tuning_caps(ah);
|
||||
ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);
|
||||
}
|
||||
|
||||
@ -1,13 +0,0 @@
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
|
||||
@@ -117,8 +117,8 @@ static int ar9003_hw_set_channel(struct
|
||||
ah->is_clk_25mhz) {
|
||||
u32 chan_frac;
|
||||
|
||||
- channelSel = (freq * 2) / 75;
|
||||
- chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
|
||||
+ channelSel = freq / 75;
|
||||
+ chan_frac = ((freq % 75) * 0x20000) / 75;
|
||||
channelSel = (channelSel << 17) | chan_frac;
|
||||
} else {
|
||||
channelSel = CHANSEL_5G(freq);
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue